1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Texas Instruments System Control Interface Protocol
4 * Based on include/linux/soc/ti/ti_sci_protocol.h from Linux.
5 *
6 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
7 * Nishanth Menon
8 * Lokesh Vutla <lokeshvutla@ti.com>
9 */
10
11 #ifndef __TISCI_PROTOCOL_H
12 #define __TISCI_PROTOCOL_H
13
14 /**
15 * struct ti_sci_version_info - version information structure
16 * @abi_major: Major ABI version. Change here implies risk of backward
17 * compatibility break.
18 * @abi_minor: Minor ABI version. Change here implies new feature addition,
19 * or compatible change in ABI.
20 * @firmware_revision: Firmware revision (not usually used).
21 * @firmware_description: Firmware description (not usually used).
22 */
23 struct ti_sci_version_info {
24 u8 abi_major;
25 u8 abi_minor;
26 u16 firmware_revision;
27 char firmware_description[32];
28 };
29
30 struct ti_sci_handle;
31
32 /**
33 * struct ti_sci_board_ops - Board config operations
34 * @board_config: Command to set the board configuration
35 * Returns 0 for successful exclusive request, else returns
36 * corresponding error message.
37 * @board_config_rm: Command to set the board resource management
38 * configuration
39 * Returns 0 for successful exclusive request, else returns
40 * corresponding error message.
41 * @board_config_security: Command to set the board security configuration
42 * Returns 0 for successful exclusive request, else returns
43 * corresponding error message.
44 * @board_config_pm: Command to trigger and set the board power and clock
45 * management related configuration
46 * Returns 0 for successful exclusive request, else returns
47 * corresponding error message.
48 */
49 struct ti_sci_board_ops {
50 int (*board_config)(const struct ti_sci_handle *handle,
51 u64 addr, u32 size);
52 int (*board_config_rm)(const struct ti_sci_handle *handle,
53 u64 addr, u32 size);
54 int (*board_config_security)(const struct ti_sci_handle *handle,
55 u64 addr, u32 size);
56 int (*board_config_pm)(const struct ti_sci_handle *handle,
57 u64 addr, u32 size);
58 };
59
60 /**
61 * struct ti_sci_dev_ops - Device control operations
62 * @get_device: Command to request for device managed by TISCI
63 * Returns 0 for successful exclusive request, else returns
64 * corresponding error message.
65 * @idle_device: Command to idle a device managed by TISCI
66 * Returns 0 for successful exclusive request, else returns
67 * corresponding error message.
68 * @put_device: Command to release a device managed by TISCI
69 * Returns 0 for successful release, else returns corresponding
70 * error message.
71 * @is_valid: Check if the device ID is a valid ID.
72 * Returns 0 if the ID is valid, else returns corresponding error.
73 * @get_context_loss_count: Command to retrieve context loss counter - this
74 * increments every time the device looses context. Overflow
75 * is possible.
76 * - count: pointer to u32 which will retrieve counter
77 * Returns 0 for successful information request and count has
78 * proper data, else returns corresponding error message.
79 * @is_idle: Reports back about device idle state
80 * - req_state: Returns requested idle state
81 * Returns 0 for successful information request and req_state and
82 * current_state has proper data, else returns corresponding error
83 * message.
84 * @is_stop: Reports back about device stop state
85 * - req_state: Returns requested stop state
86 * - current_state: Returns current stop state
87 * Returns 0 for successful information request and req_state and
88 * current_state has proper data, else returns corresponding error
89 * message.
90 * @is_on: Reports back about device ON(or active) state
91 * - req_state: Returns requested ON state
92 * - current_state: Returns current ON state
93 * Returns 0 for successful information request and req_state and
94 * current_state has proper data, else returns corresponding error
95 * message.
96 * @is_transitioning: Reports back if the device is in the middle of transition
97 * of state.
98 * -current_state: Returns 'true' if currently transitioning.
99 * @set_device_resets: Command to configure resets for device managed by TISCI.
100 * -reset_state: Device specific reset bit field
101 * Returns 0 for successful request, else returns
102 * corresponding error message.
103 * @get_device_resets: Command to read state of resets for device managed
104 * by TISCI.
105 * -reset_state: pointer to u32 which will retrieve resets
106 * Returns 0 for successful request, else returns
107 * corresponding error message.
108 * @release_exclusive_devices: Command to release all the exclusive devices
109 * attached to this host. This should be used very carefully
110 * and only at the end of execution of your software.
111 *
112 * NOTE: for all these functions, the following parameters are generic in
113 * nature:
114 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
115 * -id: Device Identifier
116 *
117 * Request for the device - NOTE: the client MUST maintain integrity of
118 * usage count by balancing get_device with put_device. No refcounting is
119 * managed by driver for that purpose.
120 */
121 struct ti_sci_dev_ops {
122 int (*get_device)(const struct ti_sci_handle *handle, u32 id);
123 int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id);
124 int (*idle_device)(const struct ti_sci_handle *handle, u32 id);
125 int (*idle_device_exclusive)(const struct ti_sci_handle *handle,
126 u32 id);
127 int (*put_device)(const struct ti_sci_handle *handle, u32 id);
128 int (*is_valid)(const struct ti_sci_handle *handle, u32 id);
129 int (*get_context_loss_count)(const struct ti_sci_handle *handle,
130 u32 id, u32 *count);
131 int (*is_idle)(const struct ti_sci_handle *handle, u32 id,
132 bool *requested_state);
133 int (*is_stop)(const struct ti_sci_handle *handle, u32 id,
134 bool *req_state, bool *current_state);
135 int (*is_on)(const struct ti_sci_handle *handle, u32 id,
136 bool *req_state, bool *current_state);
137 int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id,
138 bool *current_state);
139 int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id,
140 u32 reset_state);
141 int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id,
142 u32 *reset_state);
143 int (*release_exclusive_devices)(const struct ti_sci_handle *handle);
144 };
145
146 /**
147 * struct ti_sci_clk_ops - Clock control operations
148 * @get_clock: Request for activation of clock and manage by processor
149 * - needs_ssc: 'true' if Spread Spectrum clock is desired.
150 * - can_change_freq: 'true' if frequency change is desired.
151 * - enable_input_term: 'true' if input termination is desired.
152 * @idle_clock: Request for Idling a clock managed by processor
153 * @put_clock: Release the clock to be auto managed by TISCI
154 * @is_auto: Is the clock being auto managed
155 * - req_state: state indicating if the clock is auto managed
156 * @is_on: Is the clock ON
157 * - req_state: if the clock is requested to be forced ON
158 * - current_state: if the clock is currently ON
159 * @is_off: Is the clock OFF
160 * - req_state: if the clock is requested to be forced OFF
161 * - current_state: if the clock is currently Gated
162 * @set_parent: Set the clock source of a specific device clock
163 * - parent_id: Parent clock identifier to set.
164 * @get_parent: Get the current clock source of a specific device clock
165 * - parent_id: Parent clock identifier which is the parent.
166 * @get_num_parents: Get the number of parents of the current clock source
167 * - num_parents: returns the number of parent clocks.
168 * @get_best_match_freq: Find a best matching frequency for a frequency
169 * range.
170 * - match_freq: Best matching frequency in Hz.
171 * @set_freq: Set the Clock frequency
172 * @get_freq: Get the Clock frequency
173 * - current_freq: Frequency in Hz that the clock is at.
174 *
175 * NOTE: for all these functions, the following parameters are generic in
176 * nature:
177 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
178 * -did: Device identifier this request is for
179 * -cid: Clock identifier for the device for this request.
180 * Each device has it's own set of clock inputs. This indexes
181 * which clock input to modify.
182 * -min_freq: The minimum allowable frequency in Hz. This is the minimum
183 * allowable programmed frequency and does not account for clock
184 * tolerances and jitter.
185 * -target_freq: The target clock frequency in Hz. A frequency will be
186 * processed as close to this target frequency as possible.
187 * -max_freq: The maximum allowable frequency in Hz. This is the maximum
188 * allowable programmed frequency and does not account for clock
189 * tolerances and jitter.
190 *
191 * Request for the clock - NOTE: the client MUST maintain integrity of
192 * usage count by balancing get_clock with put_clock. No refcounting is
193 * managed by driver for that purpose.
194 */
195 struct ti_sci_clk_ops {
196 int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid,
197 bool needs_ssc, bool can_change_freq,
198 bool enable_input_term);
199 int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
200 int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
201 int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u8 cid,
202 bool *req_state);
203 int (*is_on)(const struct ti_sci_handle *handle, u32 did, u8 cid,
204 bool *req_state, bool *current_state);
205 int (*is_off)(const struct ti_sci_handle *handle, u32 did, u8 cid,
206 bool *req_state, bool *current_state);
207 int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
208 u8 parent_id);
209 int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
210 u8 *parent_id);
211 int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did,
212 u8 cid, u8 *num_parents);
213 int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did,
214 u8 cid, u64 min_freq, u64 target_freq,
215 u64 max_freq, u64 *match_freq);
216 int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
217 u64 min_freq, u64 target_freq, u64 max_freq);
218 int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
219 u64 *current_freq);
220 };
221
222 /**
223 * struct ti_sci_rm_core_ops - Resource management core operations
224 * @get_range: Get a range of resources belonging to ti sci host.
225 * @get_rage_from_shost: Get a range of resources belonging to
226 * specified host id.
227 * - s_host: Host processing entity to which the
228 * resources are allocated
229 *
230 * NOTE: for these functions, all the parameters are consolidated and defined
231 * as below:
232 * - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
233 * - dev_id: TISCI device ID.
234 * - subtype: Resource assignment subtype that is being requested
235 * from the given device.
236 * - range_start: Start index of the resource range
237 * - range_end: Number of resources in the range
238 */
239 struct ti_sci_rm_core_ops {
240 int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id,
241 u8 subtype, u16 *range_start, u16 *range_num);
242 int (*get_range_from_shost)(const struct ti_sci_handle *handle,
243 u32 dev_id, u8 subtype, u8 s_host,
244 u16 *range_start, u16 *range_num);
245 };
246
247 /**
248 * struct ti_sci_core_ops - SoC Core Operations
249 * @reboot_device: Reboot the SoC
250 * Returns 0 for successful request(ideally should never return),
251 * else returns corresponding error value.
252 * @query_msmc: Query the size of available msmc
253 * Return 0 for successful query else appropriate error value.
254 */
255 struct ti_sci_core_ops {
256 int (*reboot_device)(const struct ti_sci_handle *handle);
257 int (*query_msmc)(const struct ti_sci_handle *handle,
258 u64 *msmc_start, u64 *msmc_end);
259 };
260
261 /**
262 * struct ti_sci_proc_ops - Processor specific operations.
263 *
264 * @proc_request: Request for controlling a physical processor.
265 * The requesting host should be in the processor access list.
266 * @proc_release: Relinquish a physical processor control
267 * @proc_handover: Handover a physical processor control to another host
268 * in the permitted list.
269 * @set_proc_boot_cfg: Base configuration of the processor
270 * @set_proc_boot_ctrl: Setup limited control flags in specific cases.
271 * @proc_auth_boot_image:
272 * @get_proc_boot_status: Get the state of physical processor
273 * @proc_shutdown_no_wait: Shutdown a core without requesting or waiting for a
274 * response.
275 *
276 * NOTE: for all these functions, the following parameters are generic in
277 * nature:
278 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
279 * -pid: Processor ID
280 *
281 */
282 struct ti_sci_proc_ops {
283 int (*proc_request)(const struct ti_sci_handle *handle, u8 pid);
284 int (*proc_release)(const struct ti_sci_handle *handle, u8 pid);
285 int (*proc_handover)(const struct ti_sci_handle *handle, u8 pid,
286 u8 hid);
287 int (*set_proc_boot_cfg)(const struct ti_sci_handle *handle, u8 pid,
288 u64 bv, u32 cfg_set, u32 cfg_clr);
289 int (*set_proc_boot_ctrl)(const struct ti_sci_handle *handle, u8 pid,
290 u32 ctrl_set, u32 ctrl_clr);
291 int (*proc_auth_boot_image)(const struct ti_sci_handle *handle,
292 u64 *image_addr, u32 *image_size);
293 int (*get_proc_boot_status)(const struct ti_sci_handle *handle, u8 pid,
294 u64 *bv, u32 *cfg_flags, u32 *ctrl_flags,
295 u32 *sts_flags);
296 int (*proc_shutdown_no_wait)(const struct ti_sci_handle *handle,
297 u8 pid);
298 };
299
300 #define TI_SCI_RING_MODE_RING (0)
301 #define TI_SCI_RING_MODE_MESSAGE (1)
302 #define TI_SCI_RING_MODE_CREDENTIALS (2)
303 #define TI_SCI_RING_MODE_QM (3)
304
305 #define TI_SCI_MSG_UNUSED_SECONDARY_HOST TI_SCI_RM_NULL_U8
306
307 /* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */
308 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0)
309 /* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */
310 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1)
311 /* RA config.count parameter is valid for RM ring configure TI_SCI message */
312 #define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2)
313 /* RA config.mode parameter is valid for RM ring configure TI_SCI message */
314 #define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3)
315 /* RA config.size parameter is valid for RM ring configure TI_SCI message */
316 #define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4)
317 /* RA config.order_id parameter is valid for RM ring configure TISCI message */
318 #define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5)
319
320 #define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \
321 (TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \
322 TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \
323 TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \
324 TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \
325 TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID)
326
327 /**
328 * struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations
329 * @config: configure the SoC Navigator Subsystem Ring Accelerator ring
330 * @get_config: get the SoC Navigator Subsystem Ring Accelerator ring
331 * configuration
332 */
333 struct ti_sci_rm_ringacc_ops {
334 int (*config)(const struct ti_sci_handle *handle,
335 u32 valid_params, u16 nav_id, u16 index,
336 u32 addr_lo, u32 addr_hi, u32 count, u8 mode,
337 u8 size, u8 order_id
338 );
339 int (*get_config)(const struct ti_sci_handle *handle,
340 u32 nav_id, u32 index, u8 *mode,
341 u32 *addr_lo, u32 *addr_hi, u32 *count,
342 u8 *size, u8 *order_id);
343 };
344
345 /**
346 * struct ti_sci_rm_psil_ops - PSI-L thread operations
347 * @pair: pair PSI-L source thread to a destination thread.
348 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
349 * TCHAN_THRD_ID register is updated.
350 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
351 * RCHAN_THRD_ID register is updated.
352 * @unpair: unpair PSI-L source thread from a destination thread.
353 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
354 * TCHAN_THRD_ID register is cleared.
355 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
356 * RCHAN_THRD_ID register is cleared.
357 */
358 struct ti_sci_rm_psil_ops {
359 int (*pair)(const struct ti_sci_handle *handle, u32 nav_id,
360 u32 src_thread, u32 dst_thread);
361 int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id,
362 u32 src_thread, u32 dst_thread);
363 };
364
365 /* UDMAP channel types */
366 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2
367 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */
368 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10
369 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11
370 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12
371 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13
372
373 /* UDMAP channel atypes */
374 #define TI_SCI_RM_UDMAP_ATYPE_PHYS 0
375 #define TI_SCI_RM_UDMAP_ATYPE_INTERMEDIATE 1
376 #define TI_SCI_RM_UDMAP_ATYPE_VIRTUAL 2
377
378 /* UDMAP channel scheduling priorities */
379 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_HIGH 0
380 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDHIGH 1
381 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDLOW 2
382 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_LOW 3
383
384 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0
385 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2
386
387 /* UDMAP TX/RX channel valid_params common declarations */
388 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0)
389 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1)
390 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2)
391 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3)
392 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4)
393 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5)
394 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6)
395 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7)
396 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8)
397
398 /**
399 * Configures a Navigator Subsystem UDMAP transmit channel
400 *
401 * Configures a Navigator Subsystem UDMAP transmit channel registers.
402 * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req
403 */
404 struct ti_sci_msg_rm_udmap_tx_ch_cfg {
405 u32 valid_params;
406 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9)
407 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10)
408 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11)
409 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12)
410 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13)
411 u16 nav_id;
412 u16 index;
413 u8 tx_pause_on_err;
414 u8 tx_filt_einfo;
415 u8 tx_filt_pswords;
416 u8 tx_atype;
417 u8 tx_chan_type;
418 u8 tx_supr_tdpkt;
419 u16 tx_fetch_size;
420 u8 tx_credit_count;
421 u16 txcq_qnum;
422 u8 tx_priority;
423 u8 tx_qos;
424 u8 tx_orderid;
425 u16 fdepth;
426 u8 tx_sched_priority;
427 };
428
429 /**
430 * Configures a Navigator Subsystem UDMAP receive channel
431 *
432 * Configures a Navigator Subsystem UDMAP receive channel registers.
433 * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req
434 */
435 struct ti_sci_msg_rm_udmap_rx_ch_cfg {
436 u32 valid_params;
437 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9)
438 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10)
439 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11)
440 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12)
441 u16 nav_id;
442 u16 index;
443 u16 rx_fetch_size;
444 u16 rxcq_qnum;
445 u8 rx_priority;
446 u8 rx_qos;
447 u8 rx_orderid;
448 u8 rx_sched_priority;
449 u16 flowid_start;
450 u16 flowid_cnt;
451 u8 rx_pause_on_err;
452 u8 rx_atype;
453 u8 rx_chan_type;
454 u8 rx_ignore_short;
455 u8 rx_ignore_long;
456 };
457
458 /**
459 * Configures a Navigator Subsystem UDMAP receive flow
460 *
461 * Configures a Navigator Subsystem UDMAP receive flow's registers.
462 * See @tis_ci_msg_rm_udmap_flow_cfg_req
463 */
464 struct ti_sci_msg_rm_udmap_flow_cfg {
465 u32 valid_params;
466 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0)
467 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1)
468 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2)
469 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3)
470 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4)
471 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5)
472 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6)
473 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7)
474 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8)
475 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9)
476 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10)
477 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11)
478 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12)
479 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13)
480 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14)
481 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15)
482 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16)
483 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17)
484 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18)
485 u16 nav_id;
486 u16 flow_index;
487 u8 rx_einfo_present;
488 u8 rx_psinfo_present;
489 u8 rx_error_handling;
490 u8 rx_desc_type;
491 u16 rx_sop_offset;
492 u16 rx_dest_qnum;
493 u8 rx_src_tag_hi;
494 u8 rx_src_tag_lo;
495 u8 rx_dest_tag_hi;
496 u8 rx_dest_tag_lo;
497 u8 rx_src_tag_hi_sel;
498 u8 rx_src_tag_lo_sel;
499 u8 rx_dest_tag_hi_sel;
500 u8 rx_dest_tag_lo_sel;
501 u16 rx_fdq0_sz0_qnum;
502 u16 rx_fdq1_qnum;
503 u16 rx_fdq2_qnum;
504 u16 rx_fdq3_qnum;
505 u8 rx_ps_location;
506 };
507
508 /**
509 * struct ti_sci_rm_udmap_ops - UDMA Management operations
510 * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel.
511 * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel.
512 * @rx_flow_cfg: configure SoC Navigator Subsystem UDMA receive flow.
513 */
514 struct ti_sci_rm_udmap_ops {
515 int (*tx_ch_cfg)(const struct ti_sci_handle *handle,
516 const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params);
517 int (*rx_ch_cfg)(const struct ti_sci_handle *handle,
518 const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params);
519 int (*rx_flow_cfg)(
520 const struct ti_sci_handle *handle,
521 const struct ti_sci_msg_rm_udmap_flow_cfg *params);
522 };
523
524 /**
525 * struct ti_sci_msg_fwl_region_cfg - Request and Response for firewalls settings
526 *
527 * @fwl_id: Firewall ID in question
528 * @region: Region or channel number to set config info
529 * This field is unused in case of a simple firewall and must be initialized
530 * to zero. In case of a region based firewall, this field indicates the
531 * region in question. (index starting from 0) In case of a channel based
532 * firewall, this field indicates the channel in question (index starting
533 * from 0)
534 * @n_permission_regs: Number of permission registers to set
535 * @control: Contents of the firewall CONTROL register to set
536 * @permissions: Contents of the firewall PERMISSION register to set
537 * @start_address: Contents of the firewall START_ADDRESS register to set
538 * @end_address: Contents of the firewall END_ADDRESS register to set
539 */
540 struct ti_sci_msg_fwl_region {
541 u16 fwl_id;
542 u16 region;
543 u32 n_permission_regs;
544 u32 control;
545 u32 permissions[3];
546 u64 start_address;
547 u64 end_address;
548 } __packed;
549
550 /**
551 * \brief Request and Response for firewall owner change
552 *
553 * @fwl_id: Firewall ID in question
554 * @region: Region or channel number to set config info
555 * This field is unused in case of a simple firewall and must be initialized
556 * to zero. In case of a region based firewall, this field indicates the
557 * region in question. (index starting from 0) In case of a channel based
558 * firewall, this field indicates the channel in question (index starting
559 * from 0)
560 * @n_permission_regs: Number of permission registers <= 3
561 * @control: Control register value for this region
562 * @owner_index: New owner index to change to. Owner indexes are setup in DMSC firmware boot configuration data
563 * @owner_privid: New owner priv-id, used to lookup owner_index is not known, must be set to zero otherwise
564 * @owner_permission_bits: New owner permission bits
565 */
566 struct ti_sci_msg_fwl_owner {
567 u16 fwl_id;
568 u16 region;
569 u8 owner_index;
570 u8 owner_privid;
571 u16 owner_permission_bits;
572 } __packed;
573
574 /**
575 * struct ti_sci_fwl_ops - Firewall specific operations
576 * @set_fwl_region: Request for configuring the firewall permissions.
577 * @get_fwl_region: Request for retrieving the firewall permissions.
578 * @change_fwl_owner: Request for a change of firewall owner.
579 */
580 struct ti_sci_fwl_ops {
581 int (*set_fwl_region)(const struct ti_sci_handle *handle, const struct ti_sci_msg_fwl_region *region);
582 int (*get_fwl_region)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_region *region);
583 int (*change_fwl_owner)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_owner *owner);
584 };
585
586 /**
587 * struct ti_sci_ops - Function support for TI SCI
588 * @board_ops: Miscellaneous operations
589 * @dev_ops: Device specific operations
590 * @clk_ops: Clock specific operations
591 * @core_ops: Core specific operations
592 * @proc_ops: Processor specific operations
593 * @ring_ops: Ring Accelerator Management operations
594 * @fw_ops: Firewall specific operations
595 */
596 struct ti_sci_ops {
597 struct ti_sci_board_ops board_ops;
598 struct ti_sci_dev_ops dev_ops;
599 struct ti_sci_clk_ops clk_ops;
600 struct ti_sci_core_ops core_ops;
601 struct ti_sci_proc_ops proc_ops;
602 struct ti_sci_rm_core_ops rm_core_ops;
603 struct ti_sci_rm_ringacc_ops rm_ring_ops;
604 struct ti_sci_rm_psil_ops rm_psil_ops;
605 struct ti_sci_rm_udmap_ops rm_udmap_ops;
606 struct ti_sci_fwl_ops fwl_ops;
607 };
608
609 /**
610 * struct ti_sci_handle - Handle returned to TI SCI clients for usage.
611 * @ops: operations that are made available to TI SCI clients
612 * @version: structure containing version information
613 */
614 struct ti_sci_handle {
615 struct ti_sci_ops ops;
616 struct ti_sci_version_info version;
617 };
618
619 #define TI_SCI_RESOURCE_NULL 0xffff
620
621 /**
622 * struct ti_sci_resource_desc - Description of TI SCI resource instance range.
623 * @start: Start index of the resource.
624 * @num: Number of resources.
625 * @res_map: Bitmap to manage the allocation of these resources.
626 */
627 struct ti_sci_resource_desc {
628 u16 start;
629 u16 num;
630 unsigned long *res_map;
631 };
632
633 /**
634 * struct ti_sci_resource - Structure representing a resource assigned
635 * to a device.
636 * @sets: Number of sets available from this resource type
637 * @desc: Array of resource descriptors.
638 */
639 struct ti_sci_resource {
640 u16 sets;
641 struct ti_sci_resource_desc *desc;
642 };
643
644 #if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL)
645
646 const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev);
647 const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev);
648 const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
649 const char *property);
650 u16 ti_sci_get_free_resource(struct ti_sci_resource *res);
651 void ti_sci_release_resource(struct ti_sci_resource *res, u16 id);
652 struct ti_sci_resource *
653 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
654 struct udevice *dev, u32 dev_id, char *of_prop);
655
656 #else /* CONFIG_TI_SCI_PROTOCOL */
657
658 static inline
ti_sci_get_handle_from_sysfw(struct udevice * dev)659 const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev)
660 {
661 return ERR_PTR(-EINVAL);
662 }
663
ti_sci_get_handle(struct udevice * dev)664 static inline const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev)
665 {
666 return ERR_PTR(-EINVAL);
667 }
668
669 static inline
ti_sci_get_by_phandle(struct udevice * dev,const char * property)670 const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
671 const char *property)
672 {
673 return ERR_PTR(-EINVAL);
674 }
675
ti_sci_get_free_resource(struct ti_sci_resource * res)676 static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res)
677 {
678 return TI_SCI_RESOURCE_NULL;
679 }
680
ti_sci_release_resource(struct ti_sci_resource * res,u16 id)681 static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id)
682 {
683 }
684
685 static inline struct ti_sci_resource *
devm_ti_sci_get_of_resource(const struct ti_sci_handle * handle,struct udevice * dev,u32 dev_id,char * of_prop)686 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
687 struct udevice *dev, u32 dev_id, char *of_prop)
688 {
689 return ERR_PTR(-EINVAL);
690 }
691 #endif /* CONFIG_TI_SCI_PROTOCOL */
692
693 #endif /* __TISCI_PROTOCOL_H */
694