1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <sys/sysinfo.h>
26
27 #include "common/v3d_device_info.h"
28 #include "common/v3d_limits.h"
29 #include "util/os_misc.h"
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_debug.h"
35 #include "util/u_memory.h"
36 #include "util/format/u_format.h"
37 #include "util/u_hash_table.h"
38 #include "util/u_screen.h"
39 #include "util/u_transfer_helper.h"
40 #include "util/ralloc.h"
41 #include "util/xmlconfig.h"
42
43 #include <xf86drm.h>
44 #include "v3d_screen.h"
45 #include "v3d_context.h"
46 #include "v3d_resource.h"
47 #include "compiler/v3d_compiler.h"
48 #include "drm-uapi/drm_fourcc.h"
49
50 static const char *
v3d_screen_get_name(struct pipe_screen * pscreen)51 v3d_screen_get_name(struct pipe_screen *pscreen)
52 {
53 struct v3d_screen *screen = v3d_screen(pscreen);
54
55 if (!screen->name) {
56 screen->name = ralloc_asprintf(screen,
57 "V3D %d.%d",
58 screen->devinfo.ver / 10,
59 screen->devinfo.ver % 10);
60 }
61
62 return screen->name;
63 }
64
65 static const char *
v3d_screen_get_vendor(struct pipe_screen * pscreen)66 v3d_screen_get_vendor(struct pipe_screen *pscreen)
67 {
68 return "Broadcom";
69 }
70
71 static void
v3d_screen_destroy(struct pipe_screen * pscreen)72 v3d_screen_destroy(struct pipe_screen *pscreen)
73 {
74 struct v3d_screen *screen = v3d_screen(pscreen);
75
76 _mesa_hash_table_destroy(screen->bo_handles, NULL);
77 v3d_bufmgr_destroy(pscreen);
78 slab_destroy_parent(&screen->transfer_pool);
79 free(screen->ro);
80
81 if (using_v3d_simulator)
82 v3d_simulator_destroy(screen->sim_file);
83
84 v3d_compiler_free(screen->compiler);
85 u_transfer_helper_destroy(pscreen->transfer_helper);
86
87 close(screen->fd);
88 ralloc_free(pscreen);
89 }
90
91 static bool
v3d_has_feature(struct v3d_screen * screen,enum drm_v3d_param feature)92 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
93 {
94 struct drm_v3d_get_param p = {
95 .param = feature,
96 };
97 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
98
99 if (ret != 0)
100 return false;
101
102 return p.value;
103 }
104
105 static int
v3d_screen_get_param(struct pipe_screen * pscreen,enum pipe_cap param)106 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
107 {
108 struct v3d_screen *screen = v3d_screen(pscreen);
109
110 switch (param) {
111 /* Supported features (boolean caps). */
112 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
113 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
114 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
115 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
116 case PIPE_CAP_NPOT_TEXTURES:
117 case PIPE_CAP_SHAREABLE_SHADERS:
118 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
119 case PIPE_CAP_TEXTURE_MULTISAMPLE:
120 case PIPE_CAP_TEXTURE_SWIZZLE:
121 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
122 case PIPE_CAP_START_INSTANCE:
123 case PIPE_CAP_TGSI_INSTANCEID:
124 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
125 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
126 case PIPE_CAP_VERTEX_SHADER_SATURATE:
127 case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
128 case PIPE_CAP_OCCLUSION_QUERY:
129 case PIPE_CAP_POINT_SPRITE:
130 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
131 case PIPE_CAP_DRAW_INDIRECT:
132 case PIPE_CAP_MULTI_DRAW_INDIRECT:
133 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
134 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
135 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
136 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
137 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
138 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
139 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
140 case PIPE_CAP_TGSI_TEXCOORD:
141 return 1;
142
143 case PIPE_CAP_TEXTURE_QUERY_LOD:
144 return screen->devinfo.ver >= 42;
145 break;
146
147 case PIPE_CAP_PACKED_UNIFORMS:
148 /* We can't enable this flag, because it results in load_ubo
149 * intrinsics across a 16b boundary, but v3d's TMU general
150 * memory accesses wrap on 16b boundaries.
151 */
152 return 0;
153
154 case PIPE_CAP_NIR_IMAGES_AS_DEREF:
155 return 0;
156
157 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
158 /* XXX perf: we don't want to emit these extra blits for
159 * glReadPixels(), since we still have to do an uncached read
160 * from the GPU of the result after waiting for the TFU blit
161 * to happen. However, disabling this introduces instability
162 * in
163 * dEQP-GLES31.functional.image_load_store.early_fragment_tests.*
164 * and corruption in chromium's rendering.
165 */
166 return 1;
167
168 case PIPE_CAP_COMPUTE:
169 return screen->has_csd && screen->devinfo.ver >= 41;
170
171 case PIPE_CAP_GENERATE_MIPMAP:
172 return v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_TFU);
173
174 case PIPE_CAP_INDEP_BLEND_ENABLE:
175 return screen->devinfo.ver >= 40;
176
177 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
178 return 256;
179
180 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
181 if (screen->devinfo.ver < 40)
182 return 0;
183 return 4;
184
185 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
186 if (screen->has_cache_flush)
187 return 4;
188 else
189 return 0; /* Disables shader storage */
190
191 case PIPE_CAP_GLSL_FEATURE_LEVEL:
192 return 330;
193
194 case PIPE_CAP_ESSL_FEATURE_LEVEL:
195 return 310;
196
197 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
198 return 140;
199
200 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
201 return 1;
202 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
203 return 0;
204 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
205 if (screen->devinfo.ver >= 40)
206 return 0;
207 else
208 return 1;
209 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
210 if (screen->devinfo.ver >= 40)
211 return 1;
212 else
213 return 0;
214
215 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
216 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
217 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
218 return 1;
219
220 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
221 return 4;
222
223 case PIPE_CAP_MAX_VARYINGS:
224 return V3D_MAX_FS_INPUTS / 4;
225
226 /* Texturing. */
227 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
228 if (screen->devinfo.ver < 40)
229 return 2048;
230 else if (screen->nonmsaa_texture_size_limit)
231 return 7680;
232 else
233 return 4096;
234 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
235 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
236 if (screen->devinfo.ver < 40)
237 return 12;
238 else
239 return V3D_MAX_MIP_LEVELS;
240 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
241 return 2048;
242
243 /* Render targets. */
244 case PIPE_CAP_MAX_RENDER_TARGETS:
245 return 4;
246
247 case PIPE_CAP_VENDOR_ID:
248 return 0x14E4;
249 case PIPE_CAP_ACCELERATED:
250 return 1;
251 case PIPE_CAP_VIDEO_MEMORY: {
252 uint64_t system_memory;
253
254 if (!os_get_total_physical_memory(&system_memory))
255 return 0;
256
257 return (int)(system_memory >> 20);
258 }
259 case PIPE_CAP_UMA:
260 return 1;
261
262 case PIPE_CAP_ALPHA_TEST:
263 return 0;
264
265 /* Geometry shaders */
266 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
267 /* Minimum required by GLES 3.2 */
268 return 1024;
269 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
270 /* MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS / 4 */
271 return 256;
272 case PIPE_CAP_MAX_GS_INVOCATIONS:
273 return 32;
274
275 default:
276 return u_pipe_screen_get_param_defaults(pscreen, param);
277 }
278 }
279
280 static float
v3d_screen_get_paramf(struct pipe_screen * pscreen,enum pipe_capf param)281 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
282 {
283 switch (param) {
284 case PIPE_CAPF_MAX_LINE_WIDTH:
285 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
286 return V3D_MAX_LINE_WIDTH;
287
288 case PIPE_CAPF_MAX_POINT_WIDTH:
289 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
290 return V3D_MAX_POINT_SIZE;
291
292 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
293 return 0.0f;
294 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
295 return 16.0f;
296
297 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
298 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
299 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
300 return 0.0f;
301 default:
302 fprintf(stderr, "unknown paramf %d\n", param);
303 return 0;
304 }
305 }
306
307 static int
v3d_screen_get_shader_param(struct pipe_screen * pscreen,unsigned shader,enum pipe_shader_cap param)308 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
309 enum pipe_shader_cap param)
310 {
311 struct v3d_screen *screen = v3d_screen(pscreen);
312
313 switch (shader) {
314 case PIPE_SHADER_VERTEX:
315 case PIPE_SHADER_FRAGMENT:
316 break;
317 case PIPE_SHADER_COMPUTE:
318 if (!screen->has_csd)
319 return 0;
320 break;
321 case PIPE_SHADER_GEOMETRY:
322 if (screen->devinfo.ver < 41)
323 return 0;
324 break;
325 default:
326 return 0;
327 }
328
329 /* this is probably not totally correct.. but it's a start: */
330 switch (param) {
331 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
332 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
333 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
334 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
335 return 16384;
336
337 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
338 return UINT_MAX;
339
340 case PIPE_SHADER_CAP_MAX_INPUTS:
341 switch (shader) {
342 case PIPE_SHADER_VERTEX:
343 return V3D_MAX_VS_INPUTS / 4;
344 case PIPE_SHADER_GEOMETRY:
345 return V3D_MAX_GS_INPUTS / 4;
346 case PIPE_SHADER_FRAGMENT:
347 return V3D_MAX_FS_INPUTS / 4;
348 default:
349 return 0;
350 };
351 case PIPE_SHADER_CAP_MAX_OUTPUTS:
352 if (shader == PIPE_SHADER_FRAGMENT)
353 return 4;
354 else
355 return V3D_MAX_FS_INPUTS / 4;
356 case PIPE_SHADER_CAP_MAX_TEMPS:
357 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
358 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
359 /* Note: Limited by the offset size in
360 * v3d_unit_data_create().
361 */
362 return 16 * 1024 * sizeof(float);
363 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
364 return 16;
365 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
366 return 0;
367 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
368 return 1;
369 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
370 return 0;
371 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
372 return 1;
373 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
374 return 1;
375 case PIPE_SHADER_CAP_SUBROUTINES:
376 return 0;
377 case PIPE_SHADER_CAP_INTEGERS:
378 return 1;
379 case PIPE_SHADER_CAP_FP16:
380 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
381 case PIPE_SHADER_CAP_INT16:
382 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
383 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
384 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
385 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
386 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
387 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
388 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
389 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
390 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
391 return 0;
392 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
393 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
394 return V3D_OPENGL_MAX_TEXTURE_SAMPLERS;
395
396 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
397 if (screen->has_cache_flush) {
398 if (shader == PIPE_SHADER_VERTEX ||
399 shader == PIPE_SHADER_GEOMETRY) {
400 return 0;
401 }
402 return PIPE_MAX_SHADER_BUFFERS;
403 } else {
404 return 0;
405 }
406
407 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
408 if (screen->has_cache_flush) {
409 if (screen->devinfo.ver < 41)
410 return 0;
411 else
412 return PIPE_MAX_SHADER_IMAGES;
413 } else {
414 return 0;
415 }
416
417 case PIPE_SHADER_CAP_PREFERRED_IR:
418 return PIPE_SHADER_IR_NIR;
419 case PIPE_SHADER_CAP_SUPPORTED_IRS:
420 return 1 << PIPE_SHADER_IR_NIR;
421 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
422 return 32;
423 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
424 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
425 return 0;
426 default:
427 fprintf(stderr, "unknown shader param %d\n", param);
428 return 0;
429 }
430 return 0;
431 }
432
433 static int
v3d_get_compute_param(struct pipe_screen * pscreen,enum pipe_shader_ir ir_type,enum pipe_compute_cap param,void * ret)434 v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
435 enum pipe_compute_cap param, void *ret)
436 {
437 struct v3d_screen *screen = v3d_screen(pscreen);
438
439 if (!screen->has_csd)
440 return 0;
441
442 #define RET(x) do { \
443 if (ret) \
444 memcpy(ret, x, sizeof(x)); \
445 return sizeof(x); \
446 } while (0)
447
448 switch (param) {
449 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
450 RET((uint32_t []) { 32 });
451 break;
452
453 case PIPE_COMPUTE_CAP_IR_TARGET:
454 sprintf(ret, "v3d");
455 return strlen(ret);
456
457 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
458 RET((uint64_t []) { 3 });
459
460 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
461 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
462 * 16-bit field for the number of workgroups in each
463 * dimension.
464 */
465 RET(((uint64_t []) { 65535, 65535, 65535 }));
466
467 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
468 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
469 RET(((uint64_t []) { 256, 256, 256 }));
470
471 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
472 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
473 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
474 * limited by WG_SIZE in the CSD.
475 */
476 RET((uint64_t []) { 256 });
477
478 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
479 RET((uint64_t []) { 1024 * 1024 * 1024 });
480
481 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
482 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
483 RET((uint64_t []) { 32768 });
484
485 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
486 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
487 RET((uint64_t []) { 4096 });
488
489 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: {
490 struct sysinfo si;
491 sysinfo(&si);
492 RET((uint64_t []) { si.totalram });
493 }
494
495 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
496 /* OpenCL only */
497 RET((uint32_t []) { 0 });
498
499 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
500 RET((uint32_t []) { 1 });
501
502 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
503 RET((uint32_t []) { 1 });
504
505 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
506 RET((uint32_t []) { 16 });
507
508 }
509
510 return 0;
511 }
512
513 static bool
v3d_screen_is_format_supported(struct pipe_screen * pscreen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned usage)514 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
515 enum pipe_format format,
516 enum pipe_texture_target target,
517 unsigned sample_count,
518 unsigned storage_sample_count,
519 unsigned usage)
520 {
521 struct v3d_screen *screen = v3d_screen(pscreen);
522
523 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
524 return false;
525
526 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES)
527 return false;
528
529 if (target >= PIPE_MAX_TEXTURE_TYPES) {
530 return false;
531 }
532
533 if (usage & PIPE_BIND_VERTEX_BUFFER) {
534 switch (format) {
535 case PIPE_FORMAT_R32G32B32A32_FLOAT:
536 case PIPE_FORMAT_R32G32B32_FLOAT:
537 case PIPE_FORMAT_R32G32_FLOAT:
538 case PIPE_FORMAT_R32_FLOAT:
539 case PIPE_FORMAT_R32G32B32A32_SNORM:
540 case PIPE_FORMAT_R32G32B32_SNORM:
541 case PIPE_FORMAT_R32G32_SNORM:
542 case PIPE_FORMAT_R32_SNORM:
543 case PIPE_FORMAT_R32G32B32A32_SSCALED:
544 case PIPE_FORMAT_R32G32B32_SSCALED:
545 case PIPE_FORMAT_R32G32_SSCALED:
546 case PIPE_FORMAT_R32_SSCALED:
547 case PIPE_FORMAT_R16G16B16A16_UNORM:
548 case PIPE_FORMAT_R16G16B16_UNORM:
549 case PIPE_FORMAT_R16G16_UNORM:
550 case PIPE_FORMAT_R16_UNORM:
551 case PIPE_FORMAT_R16G16B16A16_SNORM:
552 case PIPE_FORMAT_R16G16B16_SNORM:
553 case PIPE_FORMAT_R16G16_SNORM:
554 case PIPE_FORMAT_R16_SNORM:
555 case PIPE_FORMAT_R16G16B16A16_USCALED:
556 case PIPE_FORMAT_R16G16B16_USCALED:
557 case PIPE_FORMAT_R16G16_USCALED:
558 case PIPE_FORMAT_R16_USCALED:
559 case PIPE_FORMAT_R16G16B16A16_SSCALED:
560 case PIPE_FORMAT_R16G16B16_SSCALED:
561 case PIPE_FORMAT_R16G16_SSCALED:
562 case PIPE_FORMAT_R16_SSCALED:
563 case PIPE_FORMAT_B8G8R8A8_UNORM:
564 case PIPE_FORMAT_R8G8B8A8_UNORM:
565 case PIPE_FORMAT_R8G8B8_UNORM:
566 case PIPE_FORMAT_R8G8_UNORM:
567 case PIPE_FORMAT_R8_UNORM:
568 case PIPE_FORMAT_R8G8B8A8_SNORM:
569 case PIPE_FORMAT_R8G8B8_SNORM:
570 case PIPE_FORMAT_R8G8_SNORM:
571 case PIPE_FORMAT_R8_SNORM:
572 case PIPE_FORMAT_R8G8B8A8_USCALED:
573 case PIPE_FORMAT_R8G8B8_USCALED:
574 case PIPE_FORMAT_R8G8_USCALED:
575 case PIPE_FORMAT_R8_USCALED:
576 case PIPE_FORMAT_R8G8B8A8_SSCALED:
577 case PIPE_FORMAT_R8G8B8_SSCALED:
578 case PIPE_FORMAT_R8G8_SSCALED:
579 case PIPE_FORMAT_R8_SSCALED:
580 case PIPE_FORMAT_R10G10B10A2_UNORM:
581 case PIPE_FORMAT_B10G10R10A2_UNORM:
582 case PIPE_FORMAT_R10G10B10A2_SNORM:
583 case PIPE_FORMAT_B10G10R10A2_SNORM:
584 case PIPE_FORMAT_R10G10B10A2_USCALED:
585 case PIPE_FORMAT_B10G10R10A2_USCALED:
586 case PIPE_FORMAT_R10G10B10A2_SSCALED:
587 case PIPE_FORMAT_B10G10R10A2_SSCALED:
588 break;
589 default:
590 return false;
591 }
592 }
593
594 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
595 * of FRAMEBUFFER_MAX_SAMPLES
596 */
597 if ((usage & PIPE_BIND_RENDER_TARGET) &&
598 format != PIPE_FORMAT_NONE &&
599 !v3d_rt_format_supported(&screen->devinfo, format)) {
600 return false;
601 }
602
603 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
604 !v3d_tex_format_supported(&screen->devinfo, format)) {
605 return false;
606 }
607
608 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
609 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
610 format == PIPE_FORMAT_X8Z24_UNORM ||
611 format == PIPE_FORMAT_Z16_UNORM ||
612 format == PIPE_FORMAT_Z32_FLOAT ||
613 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
614 return false;
615 }
616
617 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
618 !(format == PIPE_FORMAT_I8_UINT ||
619 format == PIPE_FORMAT_I16_UINT ||
620 format == PIPE_FORMAT_I32_UINT)) {
621 return false;
622 }
623
624 return true;
625 }
626
627 static const void *
v3d_screen_get_compiler_options(struct pipe_screen * pscreen,enum pipe_shader_ir ir,unsigned shader)628 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
629 enum pipe_shader_ir ir, unsigned shader)
630 {
631 return &v3d_nir_options;
632 }
633
634 static void
v3d_screen_query_dmabuf_modifiers(struct pipe_screen * pscreen,enum pipe_format format,int max,uint64_t * modifiers,unsigned int * external_only,int * count)635 v3d_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
636 enum pipe_format format, int max,
637 uint64_t *modifiers,
638 unsigned int *external_only,
639 int *count)
640 {
641 int i;
642 uint64_t available_modifiers[] = {
643 DRM_FORMAT_MOD_BROADCOM_UIF,
644 DRM_FORMAT_MOD_LINEAR,
645 };
646 int num_modifiers = ARRAY_SIZE(available_modifiers);
647
648 if (!modifiers) {
649 *count = num_modifiers;
650 return;
651 }
652
653 *count = MIN2(max, num_modifiers);
654 for (i = 0; i < *count; i++) {
655 modifiers[i] = available_modifiers[i];
656 if (external_only)
657 external_only[i] = false;
658 }
659 }
660
661 struct pipe_screen *
v3d_screen_create(int fd,const struct pipe_screen_config * config,struct renderonly * ro)662 v3d_screen_create(int fd, const struct pipe_screen_config *config,
663 struct renderonly *ro)
664 {
665 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
666 struct pipe_screen *pscreen;
667
668 pscreen = &screen->base;
669
670 pscreen->destroy = v3d_screen_destroy;
671 pscreen->get_param = v3d_screen_get_param;
672 pscreen->get_paramf = v3d_screen_get_paramf;
673 pscreen->get_shader_param = v3d_screen_get_shader_param;
674 pscreen->get_compute_param = v3d_get_compute_param;
675 pscreen->context_create = v3d_context_create;
676 pscreen->is_format_supported = v3d_screen_is_format_supported;
677
678 screen->fd = fd;
679 if (ro) {
680 screen->ro = renderonly_dup(ro);
681 if (!screen->ro) {
682 fprintf(stderr, "Failed to dup renderonly object\n");
683 ralloc_free(screen);
684 return NULL;
685 }
686 }
687 list_inithead(&screen->bo_cache.time_list);
688 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
689 screen->bo_handles = util_hash_table_create_ptr_keys();
690
691 #if defined(USE_V3D_SIMULATOR)
692 screen->sim_file = v3d_simulator_init(screen->fd);
693 #endif
694
695 if (!v3d_get_device_info(screen->fd, &screen->devinfo, &v3d_ioctl))
696 goto fail;
697
698 /* We have to driCheckOption for the simulator mode to not assertion
699 * fail on not having our XML config.
700 */
701 const char *nonmsaa_name = "v3d_nonmsaa_texture_size_limit";
702 screen->nonmsaa_texture_size_limit =
703 driCheckOption(config->options, nonmsaa_name, DRI_BOOL) &&
704 driQueryOptionb(config->options, nonmsaa_name);
705
706 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
707
708 screen->has_csd = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CSD);
709 screen->has_cache_flush =
710 v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH);
711
712 v3d_fence_init(screen);
713
714 v3d_process_debug_variable();
715
716 v3d_resource_screen_init(pscreen);
717
718 screen->compiler = v3d_compiler_init(&screen->devinfo);
719
720 pscreen->get_name = v3d_screen_get_name;
721 pscreen->get_vendor = v3d_screen_get_vendor;
722 pscreen->get_device_vendor = v3d_screen_get_vendor;
723 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
724 pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
725
726 return pscreen;
727
728 fail:
729 close(fd);
730 ralloc_free(pscreen);
731 return NULL;
732 }
733