/external/ipsec-tools/src/racoon/ |
D | vmbuf.c | 121 vdup(src) in vdup() function
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D | debugrm.h | 89 #define vdup(old) \ macro
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/external/llvm/utils/PerfectShuffle/ |
D | PerfectShuffle.cpp | 527 struct vdup : public Operator { struct 528 vdup(const char *N, unsigned Opc) in vdup() function
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/external/swiftshader/third_party/llvm-7.0/llvm/utils/PerfectShuffle/ |
D | PerfectShuffle.cpp | 527 struct vdup : public Operator { struct 528 vdup(const char *N, unsigned Opc) in vdup() function
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/external/v8/src/compiler/backend/arm/ |
D | code-generator-arm.cc | 2081 __ vdup(Neon32, dst, i.InputRegister(0)); in AssembleArchInstruction() local 2172 __ vdup(Neon32, i.OutputSimd128Register(), in AssembleArchInstruction() local 2330 __ vdup(Neon32, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction() local 2492 __ vdup(Neon16, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction() local 2670 __ vdup(Neon8, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction() local 2850 __ vdup(size, i.OutputSimd128Register(), in AssembleArchInstruction() local
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/external/v8/src/codegen/arm/ |
D | assembler-arm.cc | 3840 void Assembler::vdup(NeonSize size, QwNeonRegister dst, Register src) { in vdup() function in v8::internal::Assembler 3892 void Assembler::vdup(NeonSize size, DwVfpRegister dst, DwVfpRegister src, in vdup() function in v8::internal::Assembler 3899 void Assembler::vdup(NeonSize size, QwNeonRegister dst, DwVfpRegister src, in vdup() function in v8::internal::Assembler
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/external/swiftshader/third_party/subzero/src/DartARM32/ |
D | assembler_arm.cc | 1379 void Assembler::vdup(OperandSize sz, QRegister qd, DRegister dm, int idx) { in vdup() function in dart::Assembler
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 4388 void vdup(DataType dt, QRegister rd, Register rt) { vdup(al, dt, rd, rt); } in vdup() function 4391 void vdup(DataType dt, DRegister rd, Register rt) { vdup(al, dt, rd, rt); } in vdup() function 4394 void vdup(DataType dt, DRegister rd, DRegisterLane rm) { in vdup() function 4399 void vdup(DataType dt, QRegister rd, DRegisterLane rm) { in vdup() function
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D | assembler-aarch32.cc | 17289 void Assembler::vdup(Condition cond, DataType dt, QRegister rd, Register rt) { in vdup() function in vixl::aarch32::Assembler 17320 void Assembler::vdup(Condition cond, DataType dt, DRegister rd, Register rt) { in vdup() function in vixl::aarch32::Assembler 17351 void Assembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Assembler 17381 void Assembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Assembler
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D | disasm-aarch32.cc | 4697 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler 4706 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler 4715 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler 4724 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 3421 void AssemblerARM32::vdup(Type ElmtTy, const Operand *OpQd, const Operand *OpQn, in vdup() function in Ice::ARM32::AssemblerARM32
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