1 /******************************************************************************* 2 * Copyright (C) 2018 Cadence Design Systems, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining 5 * a copy of this software and associated documentation files (the 6 * "Software"), to use this Software with Cadence processor cores only and 7 * not with any other processors and platforms, subject to 8 * the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included 11 * in all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 16 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 17 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 18 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 19 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 21 ******************************************************************************/ 22 23 #include <xtensa/simcall.h> 24 #include <xtensa/corebits.h> 25 #include <xtensa/config/system.h> 26 #include <xtensa/config/core.h> 27 28 #ifndef __ARCH_HIFI330_H__ 29 #define __ARCH_HIFI330_H__ 30 31 #ifdef __ASSEMBLER__ 32 #include <xtensa/coreasm.h> 33 #endif 34 35 #include <xtensa/corebits.h> 36 #include <xtensa/config/system.h> 37 38 /* 39 Align a value up to nearest n-byte boundary, where n is a power of 2. 40 */ 41 #define ALIGNUP(n, val) (((val) + (n)-1) & -(n)) 42 43 44 /******************************************************************************* 45 INTERRUPT STACK FRAME FOR A THREAD OR NESTED INTERRUPT 46 *******************************************************************************/ 47 #define XT_STK_EXIT 0x00 /* (offset 0) exit point for dispatch */ 48 #define XT_STK_PC 0x04 /* return address */ 49 #define XT_STK_PS 0x08 /* at level 1 PS.EXCM is set here */ 50 #define XT_STK_A0 0x0C 51 #define XT_STK_A1 0x10 /* stack ptr before interrupt */ 52 #define XT_STK_A2 0x14 53 #define XT_STK_A3 0x18 54 #define XT_STK_A4 0x1C 55 #define XT_STK_A5 0x20 56 #define XT_STK_A6 0x24 57 #define XT_STK_A7 0x28 58 #define XT_STK_A8 0x2C 59 #define XT_STK_A9 0x30 60 #define XT_STK_A10 0x34 61 #define XT_STK_A11 0x38 62 #define XT_STK_A12 0x3C /* Call0 callee-save */ 63 #define XT_STK_A13 0x40 /* Call0 callee-save */ 64 #define XT_STK_A14 0x44 /* Call0 callee-save */ 65 #define XT_STK_A15 0x48 /* Call0 callee-save */ 66 #define XT_STK_SAR 0x4C 67 68 #define XT_STK_LBEG 0x50 69 #define XT_STK_LEND 0x54 70 #define XT_STK_LCOUNT 0x58 71 #define XT_STK_NEXT1 0x5C /* next unused offset */ 72 73 #define XT_STK_EXTRA ALIGNUP(XCHAL_EXTRA_SA_ALIGN, XT_STK_NEXT1) 74 75 #define XT_STK_NEXT2 (XT_STK_EXTRA + XCHAL_EXTRA_SA_SIZE) 76 77 #define XT_STK_N_TMP 3 /* # of 4-byte temp. slots */ 78 #define XT_STK_TMP XT_STK_NEXT2 79 #define XT_STK_NEXT3 XT_STK_TMP + (4 * XT_STK_N_TMP) 80 #define XT_STK_FRMSZ (ALIGNUP(0x10, XT_STK_NEXT3) + 0x20) 81 82 83 /******************************************************************************* 84 SIMPLE STACK FRAME FOR A THREAD 85 *******************************************************************************/ 86 #define XT_SOL_EXIT XT_STK_EXIT /* code indicates solicited frame */ 87 #define XT_SOL_PC 0x04 /* return address (b30-31=callinc) */ 88 #define XT_SOL_PS 0x08 89 #define XT_SOL_NEXT 0x0c /* next unused offset */ 90 /* there may be some unused space here */ 91 #define XT_SOL_A0 ALIGNUP(0x10, XT_SOL_NEXT) 92 #define XT_SOL_A1 XT_SOL_A0 + 4 93 #define XT_SOL_A2 XT_SOL_A1 + 4 94 #define XT_SOL_A3 XT_SOL_A2 + 4 95 #define XT_SOL_FRMSZ ALIGNUP(0x10, XT_SOL_A3) 96 97 98 /******************************************************************************* 99 CO-PROCESSOR STATE SAVE AREA FOR A THREAD 100 *******************************************************************************/ 101 #define XT_CPENABLE 0 102 #define XT_CPSTORED (XT_CPENABLE + 1) 103 #define XT_CP0_SA ALIGNUP(XCHAL_CP0_SA_ALIGN, XT_CPSTORED + 1) 104 #define XT_CP1_SA ALIGNUP(XCHAL_CP1_SA_ALIGN, XT_CP0_SA + XCHAL_CP0_SA_SIZE) 105 #define XT_CP2_SA ALIGNUP(XCHAL_CP2_SA_ALIGN, XT_CP1_SA + XCHAL_CP1_SA_SIZE) 106 #define XT_CP3_SA ALIGNUP(XCHAL_CP3_SA_ALIGN, XT_CP2_SA + XCHAL_CP2_SA_SIZE) 107 #define XT_CP4_SA ALIGNUP(XCHAL_CP4_SA_ALIGN, XT_CP3_SA + XCHAL_CP3_SA_SIZE) 108 #define XT_CP5_SA ALIGNUP(XCHAL_CP5_SA_ALIGN, XT_CP4_SA + XCHAL_CP4_SA_SIZE) 109 #define XT_CP6_SA ALIGNUP(XCHAL_CP6_SA_ALIGN, XT_CP5_SA + XCHAL_CP5_SA_SIZE) 110 #define XT_CP7_SA ALIGNUP(XCHAL_CP7_SA_ALIGN, XT_CP6_SA + XCHAL_CP6_SA_SIZE) 111 #define XT_CP_SIZE ALIGNUP(4 , XT_CP7_SA + XCHAL_CP7_SA_SIZE) 112 113 #ifdef __ASSEMBLER__ 114 /* Windowed */ 115 #define ENTRY(sz) entry sp, sz 116 #define ENTRY0 entry sp, 0x10 117 #define RET(sz) retw 118 #define RET0 retw 119 #endif 120 121 #define XT_TICK_PER_SEC 100 122 #define XT_RTOS_INT_ENTER OS_IntEnter 123 #define XT_RTOS_INT_EXIT OS_IntExit 124 #define XT_RTOS_CP_STATE OS_GetTaskCoprocState 125 126 #ifdef __ASSEMBLER__ 127 // typedef struct vos_tcb { 128 #define OSTCBStkPtr 0x00 // OSTCBStkPtr 129 #define OSTCBStkBottom 0x10 // StackAddress 130 //... 131 // } VOS_TCB; 132 #endif /* __ASSEMBLER__ */ 133 134 #endif /* end of arch_balongV7r1.h */ 135