1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> 4 * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> 5 * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> 6 * 7 * Configuration settings for the BTicion i.MX6DL Mamoj board. 8 */ 9 10 #ifndef __IMX6DL_MAMOJ_CONFIG_H 11 #define __IMX6DL_MAMOJ_CONFIG_H 12 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 16 /* Size of malloc() pool */ 17 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) 18 19 /* Total Size of Environment Sector */ 20 21 /* Allow to overwrite serial and ethaddr */ 22 #define CONFIG_ENV_OVERWRITE 23 24 /* Environment */ 25 #ifndef CONFIG_ENV_IS_NOWHERE 26 /* Environment in MMC */ 27 #endif 28 29 #ifndef CONFIG_SPL_BUILD 30 #define CONFIG_EXTRA_ENV_SETTINGS \ 31 "scriptaddr=0x14000000\0" \ 32 "fdt_addr_r=0x13000000\0" \ 33 "kernel_addr_r=0x10008000\0" \ 34 "fdt_high=0xffffffff\0" \ 35 "dfu_alt_info_spl=spl raw 0x2 0x400\0" \ 36 "dfu_alt_info_uboot=u-boot raw 0x8a 0x11400\0" \ 37 BOOTENV 38 39 #define BOOT_TARGET_DEVICES(func) \ 40 func(MMC, mmc, 2) 41 42 #include <config_distro_bootcmd.h> 43 #endif 44 45 /* UART */ 46 #define CONFIG_MXC_UART_BASE UART3_BASE 47 48 /* MMC */ 49 #define CONFIG_SYS_MMC_ENV_DEV 2 50 51 /* Ethernet */ 52 #define CONFIG_FEC_MXC_PHYADDR 1 53 54 /* USB */ 55 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 56 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 57 #define CONFIG_MXC_USB_FLAGS 0 58 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 59 60 /* Falcon */ 61 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 62 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 63 #define CONFIG_CMD_SPL 64 #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 65 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) 66 67 /* MMC support: args@1MB kernel@2MB */ 68 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 69 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 70 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 71 72 /* Miscellaneous configurable options */ 73 #define CONFIG_SYS_MEMTEST_START 0x80000000 74 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 75 76 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 77 #define CONFIG_SYS_HZ 1000 78 79 /* Physical Memory Map */ 80 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 81 82 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 83 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 84 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 85 86 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 87 GENERATED_GBL_DATA_SIZE) 88 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 89 CONFIG_SYS_INIT_SP_OFFSET) 90 91 /* SPL */ 92 #include "imx6_spl.h" 93 94 #endif /* __IMX6DL_MAMOJ_CONFIG_H */ 95