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Searched refs:Condition (Results 1 – 22 of 22) sorted by relevance

/art/test/663-checker-select-generator/
Dinfo.txt5 If [ Condition ]
14 return Select [FalseValue, TrueValue, Condition]
/art/compiler/utils/x86/
Dconstants_x86.h64 enum Condition { enum
Dassembler_x86.h382 void cmovl(Condition condition, Register dst, Register src);
383 void cmovl(Condition condition, Register dst, const Address& src);
385 void setb(Condition condition, Register dst);
779 void j(Condition condition, Label* label);
780 void j(Condition condition, NearLabel* label);
Dassembler_x86.cc397 void X86Assembler::cmovl(Condition condition, Register dst, Register src) { in cmovl()
405 void X86Assembler::cmovl(Condition condition, Register dst, const Address& src) { in cmovl()
413 void X86Assembler::setb(Condition condition, Register dst) { in setb()
3469 void X86Assembler::j(Condition condition, Label* label) { in j()
3492 void X86Assembler::j(Condition condition, NearLabel* label) { in j()
Djni_macro_assembler_x86.cc567 art::x86::Condition x86_cond; in Jump()
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.h219 vixl::aarch64::Condition cond = vixl::aarch64::al);
230 vixl::aarch64::Condition cond = vixl::aarch64::al);
234 vixl::aarch64::Condition cond = vixl::aarch64::al);
Djni_macro_assembler_arm64.cc80 void Arm64JNIMacroAssembler::AddConstant(XRegister rd, int32_t value, Condition cond) { in AddConstant()
87 Condition cond) { in AddConstant()
203 void Arm64JNIMacroAssembler::LoadImmediate(XRegister dest, int32_t value, Condition cond) { in LoadImmediate()
/art/compiler/utils/x86_64/
Dconstants_x86_64.h91 enum Condition { enum
Dassembler_x86_64.h394 void cmov(Condition c, CpuRegister dst, CpuRegister src); // This is the 64b version.
395 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
396 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
833 void j(Condition condition, Label* label);
834 void j(Condition condition, NearLabel* label);
850 void setcc(Condition condition, CpuRegister dst);
Dassembler_x86_64.cc249 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src) { in cmov()
253 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov()
262 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov()
4686 void X86_64Assembler::j(Condition condition, Label* label) { in j()
4709 void X86_64Assembler::j(Condition condition, NearLabel* label) { in j()
4853 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc()
Djni_macro_assembler_x86_64.cc632 art::x86_64::Condition x86_64_cond; in Jump()
Dassembler_x86_64_test.cc2239 assembler->setcc(static_cast<x86_64::Condition>(i), *reg); in setcc_test_fn()
/art/compiler/utils/arm/
Dassembler_arm_vixl.h148 void B(vixl32::Condition cond, vixl32::Label* label, bool is_far_target = true);
249 vixl32::Condition cond = vixl32::al);
Dassembler_arm_vixl.cc448 vixl32::Condition cond) { in AddConstantInIt()
493 void ArmVIXLMacroAssembler::B(vixl32::Condition cond, vixl32::Label* label, bool is_far_target) { in B()
/art/compiler/optimizing/
Dscheduler_arm.h79 M(Condition , unused) \
Dcode_generator_arm_vixl.cc949 inline vixl32::Condition ARMCondition(IfCondition cond) { in ARMCondition()
967 inline vixl32::Condition ARMUnsignedCondition(IfCondition cond) { in ARMUnsignedCondition()
986 inline vixl32::Condition ARMFPCondition(IfCondition cond, bool gt_bias) { in ARMFPCondition()
1303 static std::pair<vixl32::Condition, vixl32::Condition> GenerateLongTestConstant( in GenerateLongTestConstant()
1317 std::pair<vixl32::Condition, vixl32::Condition> ret(eq, ne); in GenerateLongTestConstant()
1424 static std::pair<vixl32::Condition, vixl32::Condition> GenerateLongTest( in GenerateLongTest()
1438 std::pair<vixl32::Condition, vixl32::Condition> ret(eq, ne); in GenerateLongTest()
1495 static std::pair<vixl32::Condition, vixl32::Condition> GenerateTest(HCondition* condition, in GenerateTest()
1501 std::pair<vixl32::Condition, vixl32::Condition> ret(eq, ne); in GenerateTest()
2695 vixl32::Condition arm_cond = vixl32::Condition::None(); in GenerateTestAndBranch()
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Dcode_generator_arm_vixl.h487 vixl::aarch32::Condition cond = vixl::aarch32::al);
492 vixl::aarch32::Condition cond = vixl::aarch32::al);
Dcode_generator_x86_64.cc949 inline Condition X86_64IntegerCondition(IfCondition cond) { in X86_64IntegerCondition()
967 inline Condition X86_64FPCondition(IfCondition cond) { in X86_64FPCondition()
1936 Condition cond = kNotEqual; in VisitSelect()
2205 Condition less_cond = kLess; in VisitCompare()
3669 __ j(Condition::kZero, &done); in RemByPowerOfTwo()
3672 __ cmov(Condition::kLess, out, tmp, false); in RemByPowerOfTwo()
3682 __ j(Condition::kZero, &done); in RemByPowerOfTwo()
4101 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, /*is64bit*/ true); in GenerateMinMaxInt()
4105 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, /*is64bit*/ false); in GenerateMinMaxInt()
4150 __ j(Condition::kParityEven, &nan); in GenerateMinMaxFP()
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Dcode_generator_x86.cc927 inline Condition X86Condition(IfCondition cond) { in X86Condition()
945 inline Condition X86UnsignedOrFPCondition(IfCondition cond) { in X86UnsignedOrFPCondition()
1516 Condition final_condition = X86UnsignedOrFPCondition(if_cond); // unsigned on lower part in GenerateLongComparesAndJumps()
1872 Condition cond = kNotEqual; in VisitSelect()
3635 __ j(Condition::kZero, &done); in RemByPowerOfTwo()
3638 __ cmovl(Condition::kLess, out, tmp); in RemByPowerOfTwo()
4043 Condition cond = is_min ? Condition::kGreaterEqual : Condition::kLess; in GenerateMinMaxInt()
4058 Condition cond = is_min ? Condition::kGreater : Condition::kLess; in GenerateMinMaxInt()
4104 __ j(Condition::kParityEven, &nan); in GenerateMinMaxFP()
4106 __ j(is_min ? Condition::kAbove : Condition::kBelow, &op2_label); in GenerateMinMaxFP()
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Dnodes.h1391 M(Above, Condition) \
1392 M(AboveOrEqual, Condition) \
1399 M(Below, Condition) \
1400 M(BelowOrEqual, Condition) \
1416 M(Equal, Condition) \
1420 M(GreaterThan, Condition) \
1421 M(GreaterThanOrEqual, Condition) \
1434 M(LessThan, Condition) \
1435 M(LessThanOrEqual, Condition) \
1452 M(NotEqual, Condition) \
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Dcode_generator_arm64.cc96 inline Condition ARM64Condition(IfCondition cond) { in ARM64Condition()
113 inline Condition ARM64FPCondition(IfCondition cond, bool gt_bias) { in ARM64FPCondition()
2799 Condition cond = hs; in VisitBoundsCheck()
3321 Condition arm64_cond; in GenerateTestAndBranch()
3425 static inline Condition GetConditionForSelect(HCondition* condition) { in GetConditionForSelect()
3469 Condition csel_cond; in VisitSelect()
Dintrinsics_arm64.cc3337 vixl::aarch64::Condition cond) { in GenerateFP16Compare()