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Searched refs:Eor (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/arm/
Dassembler_arm_vixl.h97 WITH_FLAGS_DONT_CARE_RD_RN_OP(Eor);
/art/compiler/optimizing/
Dintrinsics_arm_vixl.cc1337 __ Eor(temp1, temp2, temp_reg); in GenerateStringCompareToLoop() local
2917 __ Eor(out, out, infinity); in VisitFloatIsInfinite() local
2940 __ Eor(out, out, infinity_high); in VisitDoubleIsInfinite() local
2941 __ Eor(out, out, infinity_high2); in VisitDoubleIsInfinite() local
Dcode_generator_arm_vixl.cc1089 __ Eor(out, first, second); in GenerateDataProcInstruction() local
3082 __ Eor(out, left, right); in HandleCondition() local
3085 __ Eor(out, out, 1); in HandleCondition() local
4753 __ Eor(out_reg, out_reg, mask); in VisitAbs() local
4768 __ Eor(out_reg_lo, out_reg_lo, mask); in VisitAbs() local
4769 __ Eor(out_reg_hi, out_reg_hi, mask); in VisitAbs() local
5298 __ Eor(OutputRegister(bool_not), InputRegister(bool_not), 1); in VisitBooleanNot() local
8354 __ Eor(out, first, value); in GenerateEorConst() local
8434 __ Eor(out_reg, first_reg, second_reg); in HandleBitwiseOperation() local
8452 __ Eor(out_low, first_low, second_low); in HandleBitwiseOperation() local
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Dcode_generator_vector_arm64.cc368 __ Eor(dst.V16B(), dst.V16B(), src.V16B()); in VisitVecNot() local
836 __ Eor(dst.V16B(), lhs.V16B(), rhs.V16B()); // lanes do not matter in VisitVecXor() local
Dintrinsics_arm64.cc1260 __ Eor(temp2, temp2, Operand(temp3)); in VisitStringCompareTo() local
1305 __ Eor(temp1, temp2, temp4); in VisitStringCompareTo() local
2847 __ Eor(out, out, infinity); in GenIsInfinite() local
Dcode_generator_arm64.cc2103 __ Eor(dst, lhs, rhs); in HandleBinaryOp() local
2297 __ Eor(out, left, right_operand); in VisitDataProcWithShifterOp() local
5240 __ Eor(OutputRegister(instruction), InputRegisterAt(instruction, 0), vixl::aarch64::Operand(1)); in VisitBooleanNot() local