/art/compiler/utils/x86/ |
D | assembler_x86_test.cc | 533 DriverStr(RepeatFA(&x86::X86Assembler::movups, "movups {mem}, %{reg}"), "movups_load"); in TEST_F() 541 DriverStr(RepeatFA(&x86::X86Assembler::movups, "vmovups {mem}, %{reg}"), "avx_movups_load"); in TEST_F() 545 DriverStr(RepeatAF(&x86::X86Assembler::movups, "movups %{reg}, {mem}"), "movups_store"); in TEST_F() 553 DriverStr(RepeatAF(&x86::X86Assembler::movups, "vmovups %{reg}, {mem}"), "avx_movups_store"); in TEST_F()
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D | assembler_x86.h | 389 void movups(XmmRegister dst, const Address& src); // load unaligned 391 void movups(const Address& dst, XmmRegister src); // store unaligned
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D | assembler_x86.cc | 485 void X86Assembler::movups(XmmRegister dst, const Address& src) { in movups() function in art::x86::X86Assembler 549 void X86Assembler::movups(const Address& dst, XmmRegister src) { in movups() function in art::x86::X86Assembler
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64_test.cc | 1155 DriverStr(RepeatAF(&x86_64::X86_64Assembler::movups, "movups %{reg}, {mem}"), "movups_s"); in TEST_F() 1163 DriverStr(RepeatAF(&x86_64::X86_64Assembler::movups, "vmovups %{reg}, {mem}"), "avx_movups_s"); in TEST_F() 1167 DriverStr(RepeatFA(&x86_64::X86_64Assembler::movups, "movups {mem}, %{reg}"), "movups_l"); in TEST_F() 1175 DriverStr(RepeatFA(&x86_64::X86_64Assembler::movups, "vmovups {mem}, %{reg}"), "avx_movups_l"); in TEST_F()
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D | assembler_x86_64.h | 419 void movups(XmmRegister dst, const Address& src); // load unaligned 421 void movups(const Address& dst, XmmRegister src); // store unaligned
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D | assembler_x86_64.cc | 530 void X86_64Assembler::movups(XmmRegister dst, const Address& src) { in movups() function in art::x86_64::X86_64Assembler 636 void X86_64Assembler::movups(const Address& dst, XmmRegister src) { in movups() function in art::x86_64::X86_64Assembler
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/art/compiler/optimizing/ |
D | code_generator_vector_x86_64.cc | 1309 is_aligned16 ? __ movaps(reg, address) : __ movups(reg, address); in VisitVecLoad() 1345 is_aligned16 ? __ movaps(address, reg) : __ movups(address, reg); in VisitVecStore()
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D | code_generator_vector_x86.cc | 1336 is_aligned16 ? __ movaps(reg, address) : __ movups(reg, address); in VisitVecLoad() 1372 is_aligned16 ? __ movaps(address, reg) : __ movups(address, reg); in VisitVecStore()
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D | code_generator_x86_64.cc | 1253 __ movups(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister() local 1262 __ movups(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister() local 5730 __ movups(destination.AsFpuRegister<XmmRegister>(), in EmitMove() local 5795 __ movups(Address(CpuRegister(RSP), destination.GetStackIndex()), in EmitMove() local 5834 __ movups(Address(CpuRegister(RSP), 0), XmmRegister(reg)); in Exchange128() local 5836 __ movups(XmmRegister(reg), Address(CpuRegister(RSP), 0)); in Exchange128() local
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D | code_generator_x86.cc | 988 __ movups(Address(ESP, stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister() local 997 __ movups(XmmRegister(reg_id), Address(ESP, stack_index)); in RestoreFloatingPointRegister() local 6392 __ movups(Address(ESP, destination.GetStackIndex()), source.AsFpuRegister<XmmRegister>()); in EmitMove() local 6416 __ movups(destination.AsFpuRegister<XmmRegister>(), Address(ESP, source.GetStackIndex())); in EmitMove() local 6523 __ movups(Address(ESP, 0), XmmRegister(reg)); in Exchange128() local 6525 __ movups(XmmRegister(reg), Address(ESP, 0)); in Exchange128() local
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