Searched refs:ARM_GICR_ISENABLER (Results 1 – 2 of 2) sorted by relevance
212 …MmioWrite32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOff… in ArmGicEnableInterrupt()280 …= MmioRead32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOf… in ArmGicIsInterruptEnabled()
65 #define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers macro