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/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Lan91xDxe/
DLan91xDxeHw.h102 #define EPHSR_LINK_OK BIT14
111 #define RCR_FILT_CAR BIT14
144 #define CTR_RCV_BAD BIT14
179 #define PTR_AUTO_INCR BIT14
196 #define MGMT_MSK_CRS100 BIT14
209 #define RX_BROADCAST BIT14
251 #define PHYCR_LOOPBK BIT14 // Set loopback mode
264 #define PHYSTS_100BASETX_FDPLX BIT14 // 100Mbps Full-Duplex ability
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/
DPchRegsSpi.h47 #define B_PCH_SPI_HSFS_FDV BIT14 // Flash Descriptor Valid
76 #define B_PCH_SPI_OPTYPE7_MASK (BIT15 | BIT14) // Opcode Type 7 Mask
97 #define B_PCH_SPI_FDOC_FDSS_MASK (BIT14 | BIT13 | BIT12) // Flash Descriptor Section Se…
DPchRegsPcu.h89 #define B_PCH_LPC_DEV_STS_SSE BIT14 // Signaled System Error
196 #define B_PCH_LPC_FWH_BIOS_DEC_EF0 BIT14 // F0-F8 Enable
353 #define B_PCH_ILB_DXXIR_IDR_MASK (BIT14 | BIT13 | BIT12) // INTD Mask
358 #define V_PCH_ILB_DXXIR_IDR_PIRQE BIT14 // INTD Mapping to IRQ E
359 #define V_PCH_ILB_DXXIR_IDR_PIRQF (BIT14 | BIT12) // INTD Mapping to IRQ F
360 #define V_PCH_ILB_DXXIR_IDR_PIRQG (BIT14 | BIT13) // INTD Mapping to IRQ G
361 #define V_PCH_ILB_DXXIR_IDR_PIRQH (BIT14 | BIT13 | BIT12) // INTD Mapping to IRQ H
465 #define B_PCH_ACPI_PM1_STS_WAK_PCIE0 BIT14 // PCI Express 0 Wake Status
484 #define B_PCH_ACPI_PM1_WAK_DIS_PCIE0 BIT14 // PCI Express 0 Disable
557 #define B_PCH_SMI_EN_PERIODIC BIT14 // Periodic Enable
[all …]
DPchRegsSata.h81 #define B_PCH_SATA_PCISTS_SSE BIT14 // Signaled System Error
170 #define B_PCH_SATA_MAP_SPD (BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8) /…
171 #define B_PCH_SATA_PORT6_DISABLED BIT14
187 #define B_PCH_SATA_PCS_PORT6_DET BIT14 // Port 6 Present
DPchRegsUsb.h69 #define B_PCH_EHCI_PWR_CNTL_STS_DATASCL (BIT14 | BIT13) // Data Scale
92 #define B_PCH_XHCI_PWR_CNTL_STS_DATASCL (BIT14 | BIT13)
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/
DQuarkNcSocId.h297 #define B_TSCGF1_CONFIG_ISNSINTERNALVREFEN BIT14
446 #define B_QNC_PM1BLK_PM1S_ALL (BIT15+BIT14+BIT10+BIT5+BIT0)
448 #define B_QNC_PM1BLK_PM1S_PCIEWSTS (BIT14)
457 #define B_QNC_PM1BLK_PM1E_PWAKED (BIT14)
481 #define B_QNC_GPE0BLK_GPE0S_GPIO (BIT14) // GPIO
488 #define B_QNC_GPE0BLK_GPE0E_GPIO (BIT14) // GPIO
659 #define B_QNC_PCIE_LCAP_EL0_MASK (BIT14 | BIT13 | BIT12) //L0 Exit latency mask
690 #define B_QNC_PCIE_CCFG_UPRS (BIT14) // Upstream Posted Request Size
729 #define B_QNC_RCRB_SPIC_DC (BIT14) // SPI Data Cycle Enable
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
Dgeneral_definitions.h31 #undef BIT14
67 #define BIT14 0x00004000U macro
Dmeminit.c572 …DDRIODQ_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|… in ddrphy_init()
573 …DDRIODQ_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|… in ddrphy_init()
602 …BIT26|BIT25|BIT24|BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|… in ddrphy_init()
603 …BIT26|BIT25|BIT24|BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12)|(BIT1… in ddrphy_init()
604 …T26|BIT25|BIT24)|(BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|… in ddrphy_init()
605 …T26|BIT25|BIT24)|(BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|… in ddrphy_init()
606 …T26|BIT25|BIT24)|(BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12|BIT11|… in ddrphy_init()
611 …<16)|(0x0<<12)|(0x0<<8)|(0xF<<4)|BIT0), ((BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12)|(BIT1… in ddrphy_init()
626 …annel_i * DDRCOMP_CH_OFFSET)), (BIT19|BIT17), ((BIT31|BIT30)|BIT19|BIT17|(BIT15|BIT14))); in ddrphy_init()
637 …annel_i * DDRCOMP_CH_OFFSET)), (tempD), ((BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT14|BIT13|BIT12)|(BIT1… in ddrphy_init()
[all …]
/device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/Lan9118Dxe/
DLan9118DxeHw.h170 #define IRQCFG_INT_DEAS_CLR BIT14 // Clear the deassertion coun…
183 #define INSTS_RXE BIT14 // Receiver Error
225 #define PHYCR_LOOPBK BIT14 // Set loopback mode
238 #define PHYSTS_100BASETX_FDPLX BIT14 // 100Mbps Full-Duplex ability
308 #define TXCFG_TXD_DUMP BIT14 // Clear Tx Data FIFO
/device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/
DOmap3530Dma.h101 #define DMA4_CCR_DST_AMODE_POST_INC (0 | BIT14)
103 #define DMA4_CCR_DST_AMODE_DOUBLE_INDEX (BIT15 | BIT14)
DOmap3530Prcm.h115 #define CM_FCLKEN_PER_EN_GPIO3_ENABLE BIT14
140 #define CM_ICLKEN_PER_EN_GPIO3_ENABLE BIT14
/device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/
DI440FxPiix4.h36 #define PIIX4_PMBA_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
DVirtio095Net.h55 #define VIRTIO_NET_F_HOST_UFO BIT14 // host can receive UFO
DQ35MchIch9.h79 #define ICH9_PMBASE_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/
DCommonIncludes.h102 #define BIT14 0x00004000
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/
DBoardFeatures.h61 #define B_BOARD_FEATURES_VIIV BIT14
155 #define B_BOARD_FEATURES_TPM BIT14
/device/linaro/bootloader/edk2/MdePkg/Library/BasePrintLib/
DPrintLibInternal.h37 #define UNSIGNED_TYPE BIT14
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/
DPchRegs.h60 #define BIT14 0x4000 macro
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/
DUartInit.c31 #define B_PCH_PMC_GEN_PMCON_SUS_PWR_FLR BIT14 // SUS Well Power Failure
/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/
DIdeData.h269 #define SITRE BIT14
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/
DIoh.h43 #define BIT14 0x00004000 macro
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/
DSataRegisters.h122 #define EFI_AHCI_PORT_CMD_FR BIT14
/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL180MciDxe/
DPL180Mci.h97 #define MCI_STATUS_CMD_TXFIFOHALFEMPTY BIT14
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ata/AtaBusDxe/
DAtaPassThruExecute.c357 if ((PhyLogicSectorSupport & (BIT14 | BIT15)) == BIT14) { in IdentifyAtaDevice()
366 if ((IdentifyData->alignment_logic_in_phy_blocks & (BIT14 | BIT15)) == BIT14) { in IdentifyAtaDevice()
/device/linaro/bootloader/edk2/BaseTools/Source/C/Include/Common/
DBaseTypes.h235 #define BIT14 0x00004000 macro

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