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Searched refs:CRU_CLKGATE_CON (Results 1 – 6 of 6) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/
Drk3399_gpio.c90 CRU_CLKGATE_CON(31)) >> in gpio_get_clock()
92 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock()
98 CRU_CLKGATE_CON(31)) >> in gpio_get_clock()
100 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock()
106 CRU_CLKGATE_CON(31)) >> in gpio_get_clock()
108 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_get_clock()
136 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock()
141 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock()
147 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in gpio_put_clock()
317 cru_gate_save = mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(31)); in plat_rockchip_save_gpio()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
Dpmu.c252 mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(i)); in clks_gating_suspend()
253 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_suspend()
263 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_resume()
514 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in ddr_suspend()
516 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in ddr_suspend()
518 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in ddr_suspend()
520 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(27), in ddr_suspend()
531 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(0), in dmc_restore()
533 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(7), in dmc_restore()
535 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in dmc_restore()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/
Dsoc.h83 #define CRU_CLKGATE_CON 0x200 macro
84 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4))
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/
Dsoc.h44 #define CRU_CLKGATE_CON(i) (0x200 + ((i) * 4)) macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/
Dsoc.h187 #define CRU_CLKGATE_CON(n) (0x300 + n * 4) macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dpmu.c828 clk_ddrc_save = mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(3)); in sys_slp_config()
829 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(3), WMSK_BIT(1)); in sys_slp_config()
914 gpio_2_4_clk_gate = (mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(31)) >> in suspend_apio()
918 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in suspend_apio()
1038 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(31), in resume_apio()
1420 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(3), in rockchip_soc_sys_pwr_dm_resume()