/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ |
D | ProcessorSubClass.c | 225 IN UINT8 CacheLevel, in GetCacheSocketStr() argument 231 if(CacheLevel == CPU_CACHE_L1_Instruction) in GetCacheSocketStr() 233 …odeSPrint (CacheSocketStr, SMBIOS_STRING_MAX_LENGTH - 1, L"L%x Instruction Cache", CacheLevel + 1); in GetCacheSocketStr() 235 else if(CacheLevel == CPU_CACHE_L1_Data) in GetCacheSocketStr() 237 …rLen = UnicodeSPrint (CacheSocketStr, SMBIOS_STRING_MAX_LENGTH - 1, L"L%x Data Cache", CacheLevel); in GetCacheSocketStr() 241 …ketStrLen = UnicodeSPrint (CacheSocketStr, SMBIOS_STRING_MAX_LENGTH - 1, L"L%x Cache", CacheLevel); in GetCacheSocketStr() 249 IN UINT8 CacheLevel in UpdateSmbiosCacheTable() argument 270 if(CacheLevel == CPU_CACHE_L1_Instruction || CacheLevel == CPU_CACHE_L1_Data) in UpdateSmbiosCacheTable() 277 CacheConfig.Bits.Level = CacheLevel - 1; in UpdateSmbiosCacheTable() 281 mSmbiosCacheTable[CacheLevel].CacheConfiguration = CacheConfig.Data; in UpdateSmbiosCacheTable() [all …]
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/ |
D | CpuIA32.c | 160 IN UINT32 CacheLevel, in EfiCpuidExt() argument 168 mov ecx, CacheLevel in EfiCpuidExt()
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D | CpuIA32.S | 198 # IN UINT32 CacheLevel, 208 movl 0x34(%esp), %ecx # CacheLevel
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D | CpuIA32.asm | 181 ; IN UINT32 CacheLevel, 188 mov ecx, dword ptr [esp + 34h] ; CacheLevel
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/ |
D | CpuIA32.c | 172 IN UINT32 CacheLevel, 180 mov ecx, CacheLevel
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D | CpuIA32.S | 210 # IN UINT32 CacheLevel, 220 movl 0x34(%esp), %ecx # CacheLevel
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D | CpuIA32.asm | 199 ; IN UINT32 CacheLevel, 206 mov ecx, dword ptr [esp + 34h] ; CacheLevel
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/X64/ |
D | Cpu.asm | 197 ; IN UINT32 CacheLevel, 204 mov rcx, rdx ; rcx = CacheLevel
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D | Cpu.S | 195 # IN UINT32 CacheLevel,
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/ |
D | Cpu.asm | 218 ; IN UINT32 CacheLevel, 225 mov rcx, rdx ; rcx = CacheLevel
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D | Cpu.S | 207 # IN UINT32 CacheLevel,
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/X64/ |
D | CpuFuncs.h | 245 IN UINT32 CacheLevel,
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/Ia32/ |
D | CpuFuncs.h | 243 IN UINT32 CacheLevel,
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/SmBiosMiscDxe/ |
D | MiscProcessorInformationFunction.c | 61 IN UINT8 CacheLevel, in GetCacheHandle() 83 if ((CacheConfig & 0x7) == (CacheLevel -1) ) { in GetCacheHandle()
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Library/ |
D | CpuIA32.h | 223 IN UINT32 CacheLevel,
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/Include/ |
D | CpuIA32.h | 202 IN UINT32 CacheLevel,
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/device/linaro/bootloader/edk2/UefiCpuPkg/Application/Cpuid/ |
D | Cpuid.c | 452 UINT32 CacheLevel; in CpuidCacheParams() local 462 CacheLevel = 0; in CpuidCacheParams() 465 CPUID_CACHE_PARAMS, CacheLevel, in CpuidCacheParams() 469 Print (L"CPUID_CACHE_PARAMS (Leaf %08x, Sub-Leaf %08x)\n", CPUID_CACHE_PARAMS, CacheLevel); in CpuidCacheParams() 472 PRINT_BIT_FIELD (Eax, CacheLevel); in CpuidCacheParams() 485 CacheLevel++; in CpuidCacheParams()
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/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Binary/AmdModulePkg/Common/ |
D | CpuIscp.h | 394 UINT16 CacheLevel :3; ///< Cache Level member
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/device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/ |
D | Cpuid.h | 827 UINT32 CacheLevel:3; member
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