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Searched refs:CacheLevel (Results 1 – 19 of 19) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/
DProcessorSubClass.c225 IN UINT8 CacheLevel, in GetCacheSocketStr() argument
231 if(CacheLevel == CPU_CACHE_L1_Instruction) in GetCacheSocketStr()
233 …odeSPrint (CacheSocketStr, SMBIOS_STRING_MAX_LENGTH - 1, L"L%x Instruction Cache", CacheLevel + 1); in GetCacheSocketStr()
235 else if(CacheLevel == CPU_CACHE_L1_Data) in GetCacheSocketStr()
237 …rLen = UnicodeSPrint (CacheSocketStr, SMBIOS_STRING_MAX_LENGTH - 1, L"L%x Data Cache", CacheLevel); in GetCacheSocketStr()
241 …ketStrLen = UnicodeSPrint (CacheSocketStr, SMBIOS_STRING_MAX_LENGTH - 1, L"L%x Cache", CacheLevel); in GetCacheSocketStr()
249 IN UINT8 CacheLevel in UpdateSmbiosCacheTable() argument
270 if(CacheLevel == CPU_CACHE_L1_Instruction || CacheLevel == CPU_CACHE_L1_Data) in UpdateSmbiosCacheTable()
277 CacheConfig.Bits.Level = CacheLevel - 1; in UpdateSmbiosCacheTable()
281 mSmbiosCacheTable[CacheLevel].CacheConfiguration = CacheConfig.Data; in UpdateSmbiosCacheTable()
[all …]
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/
DCpuIA32.c160 IN UINT32 CacheLevel, in EfiCpuidExt() argument
168 mov ecx, CacheLevel in EfiCpuidExt()
DCpuIA32.S198 # IN UINT32 CacheLevel,
208 movl 0x34(%esp), %ecx # CacheLevel
DCpuIA32.asm181 ; IN UINT32 CacheLevel,
188 mov ecx, dword ptr [esp + 34h] ; CacheLevel
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/
DCpuIA32.c172 IN UINT32 CacheLevel,
180 mov ecx, CacheLevel
DCpuIA32.S210 # IN UINT32 CacheLevel,
220 movl 0x34(%esp), %ecx # CacheLevel
DCpuIA32.asm199 ; IN UINT32 CacheLevel,
206 mov ecx, dword ptr [esp + 34h] ; CacheLevel
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/X64/
DCpu.asm197 ; IN UINT32 CacheLevel,
204 mov rcx, rdx ; rcx = CacheLevel
DCpu.S195 # IN UINT32 CacheLevel,
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/
DCpu.asm218 ; IN UINT32 CacheLevel,
225 mov rcx, rdx ; rcx = CacheLevel
DCpu.S207 # IN UINT32 CacheLevel,
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/X64/
DCpuFuncs.h245 IN UINT32 CacheLevel,
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/Ia32/
DCpuFuncs.h243 IN UINT32 CacheLevel,
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/SmBiosMiscDxe/
DMiscProcessorInformationFunction.c61 IN UINT8 CacheLevel, in GetCacheHandle()
83 if ((CacheConfig & 0x7) == (CacheLevel -1) ) { in GetCacheHandle()
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Library/
DCpuIA32.h223 IN UINT32 CacheLevel,
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/Include/
DCpuIA32.h202 IN UINT32 CacheLevel,
/device/linaro/bootloader/edk2/UefiCpuPkg/Application/Cpuid/
DCpuid.c452 UINT32 CacheLevel; in CpuidCacheParams() local
462 CacheLevel = 0; in CpuidCacheParams()
465 CPUID_CACHE_PARAMS, CacheLevel, in CpuidCacheParams()
469 Print (L"CPUID_CACHE_PARAMS (Leaf %08x, Sub-Leaf %08x)\n", CPUID_CACHE_PARAMS, CacheLevel); in CpuidCacheParams()
472 PRINT_BIT_FIELD (Eax, CacheLevel); in CpuidCacheParams()
485 CacheLevel++; in CpuidCacheParams()
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Binary/AmdModulePkg/Common/
DCpuIscp.h394 UINT16 CacheLevel :3; ///< Cache Level member
/device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/
DCpuid.h827 UINT32 CacheLevel:3; member