Searched refs:Interrupts (Results 1 – 8 of 8) sorted by relevance
262 UINT32 Interrupts; in ArmGicIsInterruptEnabled() local272 …Interrupts = ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)) & (1 << RegShif… in ArmGicIsInterruptEnabled()280 …Interrupts = MmioRead32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER +… in ArmGicIsInterruptEnabled()283 return ((Interrupts & (1 << RegShift)) != 0); in ArmGicIsInterruptEnabled()
39 as a Shared Peripheral Interrupt. Shared Peripheral Interrupts are typically52 as a Private Peripheral Interrupt. Private Peripheral Interrupts are typically53 associated with peripherals that are private to each PE. Interrupts from private65 as a Software Generated Interrupt. Software Generated Interrupts are raised by
534 #. **CSS=1, TEL3=1**. Interrupts are routed to EL3 when execution is in
402 - ``HANDLE_EA_EL3_FIRST``: When defined External Aborts and SError Interrupts
205 both External Aborts and SError Interrupts in EL3. The ``SCR.SIF`` bit is
971 UINT32 Interrupts; in SnpGetStatus() local1063 Interrupts = Lan9118MmioRead32 (LAN9118_INT_STS); in SnpGetStatus()1064 if (Interrupts & INSTS_TXE) { in SnpGetStatus()
16 // Interrupts can be DEB8=all except 13,8,6,2,1,0
352 // re-arm any AP Thermal Interrupts.