| /device/linaro/bootloader/arm-trusted-firmware/lib/psci/ |
| D | psci_setup.c | 86 unsigned int nodes_idx[PLAT_MAX_PWR_LVL] = {0}; in psci_update_pwrlvl_limits()
87 unsigned int temp_index[PLAT_MAX_PWR_LVL], cpu_idx; in psci_update_pwrlvl_limits()
91 PLAT_MAX_PWR_LVL, in psci_update_pwrlvl_limits()
93 for (j = PLAT_MAX_PWR_LVL - 1; j >= 0; j--) { in psci_update_pwrlvl_limits()
114 int level = PLAT_MAX_PWR_LVL; in populate_power_domain_tree()
214 psci_set_pwr_domains_to_run(PLAT_MAX_PWR_LVL); in psci_setup()
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| D | psci_common.c | 42 psci_req_local_pwr_states[PLAT_MAX_PWR_LVL][PLATFORM_CORE_COUNT];
71 CASSERT(PLAT_MAX_PWR_LVL <= PSCI_MAX_PWR_LVL && \
72 PLAT_MAX_PWR_LVL >= PSCI_CPU_PWR_LVL, \
184 pwrlvl = PLAT_MAX_PWR_LVL; in get_power_on_target_pwrlvl()
300 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) in psci_get_target_local_pwr_states()
404 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL); in psci_do_state_coordination()
525 for (i = PLAT_MAX_PWR_LVL; i >= PSCI_CPU_PWR_LVL; i--) { in psci_find_max_off_lvl()
541 for (i = PLAT_MAX_PWR_LVL; i >= PSCI_CPU_PWR_LVL; i--) { in psci_find_target_suspend_lvl()
575 unsigned int parent_idx, parent_nodes[PLAT_MAX_PWR_LVL] = {0}; in psci_release_pwr_domain_locks()
984 psci_get_target_local_pwr_states(PLAT_MAX_PWR_LVL, &state_info); in psci_get_max_phys_off_afflvl()
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| D | psci_main.c | 170 assert(psci_find_target_suspend_lvl(&state_info) == PLAT_MAX_PWR_LVL); in psci_system_suspend()
173 assert(is_local_state_off(state_info.pwr_domain_state[PLAT_MAX_PWR_LVL])); in psci_system_suspend()
181 PLAT_MAX_PWR_LVL, in psci_system_suspend()
191 unsigned int target_pwrlvl = PLAT_MAX_PWR_LVL; in psci_cpu_off()
290 if (power_level > PLAT_MAX_PWR_LVL) in psci_node_hw_state()
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| D | psci_stat.c | 77 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL); in psci_stats_update_pwr_down()
112 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL); in psci_stats_update_pwr_up()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/ |
| D | plat_pm.c | 23 ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
138 if (pwr_lvl > PLAT_MAX_PWR_LVL) in rockchip_validate_power_state()
157 for (i = (pwr_lvl + 1); i <= PLAT_MAX_PWR_LVL; i++) in rockchip_validate_power_state()
173 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) in rockchip_get_sys_suspend_power_state()
228 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in rockchip_pwr_domain_off()
264 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in rockchip_pwr_domain_suspend()
285 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in rockchip_pwr_domain_on_finish()
329 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in rockchip_pwr_domain_suspend_finish()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/common/ |
| D | css_pm.c | 38 #if PLAT_MAX_PWR_LVL > ARM_PWR_LVL1
51 CASSERT(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL1,
58 CASSERT(PLAT_MAX_PWR_LVL <= CSS_SYSTEM_PWR_DMN_LVL,
241 assert(PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL); in css_get_sys_suspend_power_state()
243 for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) in css_get_sys_suspend_power_state()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/ |
| D | plat_psci.c | 93 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) in zynqmp_nopmu_pwr_domain_off()
111 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) in zynqmp_pwr_domain_off()
134 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) in zynqmp_nopmu_pwr_domain_suspend()
162 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) in zynqmp_pwr_domain_suspend()
181 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) in zynqmp_pwr_domain_on_finish()
194 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) in zynqmp_nopmu_pwr_domain_suspend_finish()
212 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) in zynqmp_pwr_domain_suspend_finish()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/ |
| D | plat_psci_handlers.c | 52 for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++) in tegra_soc_validate_power_state()
56 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = in tegra_soc_validate_power_state()
128 write_actlr_el1(target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]); in tegra_soc_pwr_domain_suspend()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/ |
| D | arm_pm.c | 42 if (pwr_lvl > PLAT_MAX_PWR_LVL) in arm_validate_power_state()
150 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2); in arm_system_pwr_domain_save()
173 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2); in arm_system_pwr_domain_resume()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_pm.c | 116 for (uint32_t i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) in tegra_get_sys_suspend_power_state()
171 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == in tegra_pwr_domain_suspend()
186 uint8_t pwr_state = target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]; in tegra_pwr_domain_power_down_wfi()
231 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == in tegra_pwr_domain_on_finish()
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| /device/linaro/bootloader/arm-trusted-firmware/services/spd/tlkd/ |
| D | tlkd_pm.c | 48 if ((cpu != 0) || (suspend_level != PLAT_MAX_PWR_LVL)) in cpu_suspend_handler()
81 if ((cpu != 0) || (suspend_level != PLAT_MAX_PWR_LVL)) in cpu_resume_handler()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/ |
| D | plat_psci_handlers.c | 63 for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++) in tegra_soc_validate_power_state()
66 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = in tegra_soc_validate_power_state()
165 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == in tegra_soc_pwr_domain_on_finish()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/ |
| D | plat_pm.c | 37 #define MTK_SYSTEM_PWR_STATE(state) ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) ?\
58 #if PLAT_MAX_PWR_LVL > MTK_PWR_LVL1
559 if ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) && in plat_power_domain_on_finish()
568 if ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) && in plat_power_domain_on_finish()
656 assert(PLAT_MAX_PWR_LVL >= 2); in plat_get_sys_suspend_power_state()
658 for (int i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) in plat_get_sys_suspend_power_state()
704 if (pwr_lvl > PLAT_MAX_PWR_LVL) in plat_validate_power_state()
774 assert(PLAT_MAX_PWR_LVL >= MTK_PWR_LVL2); in mtk_system_pwr_domain_resume()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/drivers/scp/ |
| D | css_pm_scmi.c | 119 for (lvl = ARM_PWR_LVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in css_scp_suspend()
163 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) { in css_scp_off()
195 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) in css_scp_on()
225 if ((power_level > PLAT_MAX_PWR_LVL) || in css_scp_get_power_state()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hikey_pm.c | 27 ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
166 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) in hikey_get_sys_suspend_power_state()
222 if (pwr_lvl > PLAT_MAX_PWR_LVL) in hikey_validate_power_state()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_pm.c | 27 ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
133 if (pwr_lvl > PLAT_MAX_PWR_LVL) in hikey960_validate_power_state()
279 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) in hikey960_get_sys_suspend_power_state()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/ |
| D | platform_def.h | 26 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2 macro
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| /device/linaro/bootloader/arm-trusted-firmware/include/plat/arm/css/common/ |
| D | css_pm.h | 21 ((PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) ?\
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/ |
| D | plat_psci_handlers.c | 99 stateid_afflvl2 = pwr_domain_state[PLAT_MAX_PWR_LVL] & in tegra_soc_pwr_domain_suspend()
237 unsigned int stateid_afflvl2 = pwr_domain_state[PLAT_MAX_PWR_LVL] & in tegra_soc_pwr_domain_power_down_wfi()
278 int stateid_afflvl2 = target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]; in tegra_soc_pwr_domain_on_finish()
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| /device/linaro/bootloader/arm-trusted-firmware/include/lib/psci/ |
| D | psci_compat.h | 18 #define PLAT_MAX_PWR_LVL PLATFORM_MAX_AFFLVL macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/include/ |
| D | platform_def.h | 25 #define PLAT_MAX_PWR_LVL 1 macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/ |
| D | platform_def.h | 54 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2 macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/include/ |
| D | platform_def.h | 53 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2 macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/include/ |
| D | platform_def.h | 55 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2 macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/include/ |
| D | platform_def.h | 30 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2 macro
|