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Searched refs:UART_LCR (Results 1 – 5 of 5) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Library/Dw8250SerialPortRuntimeLib/
DDw8250SerialPortRuntimeLib.h36 #define UART_LCR_REG (SERIAL_0_BASE_ADR + UART_LCR)
48 #define UART_LCR 0x0C macro
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Library/Dw8250SerialPortLib/
DDw8250SerialPortLib.h36 #define UART_LCR_REG (SERIAL_0_BASE_ADR + UART_LCR)
48 #define UART_LCR 0x0C macro
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/common/drivers/uart/
Duart8250.h16 #define UART_LCR 0x0c /* Line control register */ macro
D8250_console.S69 str w1, [x0, #UART_LCR]
80 str w1, [x0, #UART_LCR]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dpmu.c1123 #define UART_LCR 0x0c macro
1138 uart_save.uart_lcr = mmio_read_32(PLAT_RK_UART_BASE + UART_LCR); in suspend_uart()
1141 mmio_write_32(PLAT_RK_UART_BASE + UART_LCR, in suspend_uart()
1145 mmio_write_32(PLAT_RK_UART_BASE + UART_LCR, uart_save.uart_lcr); in suspend_uart()
1155 uart_lcr = mmio_read_32(PLAT_RK_UART_BASE + UART_LCR); in resume_uart()
1157 mmio_write_32(PLAT_RK_UART_BASE + UART_LCR, uart_lcr | UARTLCR_DLAB); in resume_uart()
1160 mmio_write_32(PLAT_RK_UART_BASE + UART_LCR, uart_save.uart_lcr); in resume_uart()