Searched refs:gr0_base (Results 1 – 1 of 1) sorted by relevance
246 UINTN gr0_base = smmu->Base; in hisi_smmu_tlb_sync() local248 writel_relaxed(0, gr0_base + SMMU_TLBGSYNC); in hisi_smmu_tlb_sync()249 while (readl_relaxed(gr0_base + SMMU_TLBGSTATUS) in hisi_smmu_tlb_sync()252 DEBUG ((EFI_D_ERROR, "TLB sync timed out -- SMMU (0x%p) may be deadlocked\n", gr0_base)); in hisi_smmu_tlb_sync()409 UINTN gr0_base = Smmu->Base; in SmmuEnableTable() local414 reg = readl_relaxed(gr0_base + SMMU_RINT_GFSR); in SmmuEnableTable()415 writel_relaxed(reg, gr0_base + SMMU_RINT_GFSR); in SmmuEnableTable()418 writel_relaxed(0, gr0_base + SMMU_CFG_GFIM); in SmmuEnableTable()422 writel_relaxed(reg, gr0_base + SMMU_CFG_CBF); in SmmuEnableTable()425 writel_relaxed(reg, gr0_base + SMMU_CFG_S2CTBAR); in SmmuEnableTable()[all …]