/device/generic/goldfish-opengl/shared/OpenglCodecCommon/ |
D | goldfish_dma.cpp | 89 void *mapped = mmap(0, cxt->size, PROT_WRITE, MAP_SHARED, cxt->fd, 0); in goldfish_dma_map() local 91 __FUNCTION__, cxt, mapped, cxt->size, errno); in goldfish_dma_map() 93 if (mapped == MAP_FAILED) { in goldfish_dma_map() 94 mapped = NULL; in goldfish_dma_map() 97 cxt->mapped_addr = reinterpret_cast<uint64_t>(mapped); in goldfish_dma_map() 98 return mapped; in goldfish_dma_map()
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D | GLSharedGroup.h | 145 void setBufferMapped(GLuint bufferId, bool mapped);
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D | GLSharedGroup.cpp | 242 void GLSharedGroup::setBufferMapped(GLuint bufferId, bool mapped) { in setBufferMapped() argument 247 buf->m_mapped = mapped; in setBufferMapped()
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/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Modules/cjkcodecs/ |
D | README | 27 Because unicode 0x5341, 0x5345, 0xFF0F, 0xFF3C is mapped to another 67 - U+FF3C FULLWIDTH REVERSE SOLIDUS is mapped to EUC-JP A1C0 (vice versa) 68 - U+00A5 YEN SIGN is mapped to EUC-JP 0x5c. (one way) 69 - U+203E OVERLINE is mapped to EUC-JP 0x7e. (one way) 76 - U+005C REVERSE SOLIDUS is mapped to SHIFT-JIS 0x5c. 77 - U+007E TILDE is mapped to SHIFT-JIS 0x7e. 78 - U+FF3C FULL-WIDTH REVERSE SOLIDUS is mapped to SHIFT-JIS 815f.
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/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.10/Modules/cjkcodecs/ |
D | README | 27 Because unicode 0x5341, 0x5345, 0xFF0F, 0xFF3C is mapped to another 67 - U+FF3C FULLWIDTH REVERSE SOLIDUS is mapped to EUC-JP A1C0 (vice versa) 68 - U+00A5 YEN SIGN is mapped to EUC-JP 0x5c. (one way) 69 - U+203E OVERLINE is mapped to EUC-JP 0x7e. (one way) 76 - U+005C REVERSE SOLIDUS is mapped to SHIFT-JIS 0x5c. 77 - U+007E TILDE is mapped to SHIFT-JIS 0x7e. 78 - U+FF3C FULL-WIDTH REVERSE SOLIDUS is mapped to SHIFT-JIS 815f.
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1616/D05AcpiTables/ |
D | Gtdt.aslc | 30 // Note: We could have a build flag that switches between memory mapped/non-memory mapped timer
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Pv660AcpiTables/ |
D | Gtdt.aslc | 31 // Note: We could have a build flag that switches between memory mapped/non-memory mapped timer
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/ |
D | Gtdt.aslc | 31 // Note: We could have a build flag that switches between memory mapped/non-memory mapped timer
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/device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/Juno/AcpiTables/ |
D | Gtdt.aslc | 26 // Note: We could have a build flag that switches between memory mapped/non-memory mapped timer
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/device/mediatek/wembley-sepolicy/private/compat/26.0/ |
D | 26.0.ignore.cil | 35 ;; Thus, these types are also not mapped, but recorded for checkapi tests
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/device/linaro/bootloader/edk2/StdLib/BsdSocketLib/ |
D | gethostbydns.c | 638 static const u_char mapped[] = { 0,0, 0,0, 0,0, 0,0, 0,0, 0xff,0xff }; in _gethostbydnsaddr() local 656 (!bcmp(uaddr, mapped, sizeof mapped) || in _gethostbydnsaddr() 659 addr += sizeof mapped; in _gethostbydnsaddr() 660 uaddr += sizeof mapped; in _gethostbydnsaddr()
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/device/linaro/bootloader/edk2/EmbeddedPkg/Scripts/LauterbachT32/ |
D | README.txt | 7 …ect where these images reside so you must pass an address for the memory-mapped Firmware Volume co…
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/device/linaro/dragonboard/gralloc/ |
D | gralloc_gbm.cpp | 461 int mapped = bo_data->locked_for & in gralloc_gbm_bo_unlock() local 467 if (mapped) in gralloc_gbm_bo_unlock()
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/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Mcfg/ |
D | Mcfg.aslc | 21 This file contains a structure definition for the ACPI Memory mapped
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/device/generic/opengl-transport/host/libs/virglrenderer/ |
D | README.md | 15 response comes back through a separate memory mapped buffer. Responses are very 33 would be directly mapped to GL texture names, but in AVDVirglRenderer we
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D | GLESv3.cpp | 425 GLbitfield access, void* mapped) { in glMapBufferRangeAEMU() argument 431 if (mapped) in glMapBufferRangeAEMU() 432 memcpy(mapped, gpuPtr, length); in glMapBufferRangeAEMU()
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/device/generic/opengl-transport/host/libs/virglrenderer/GLESv3_dec/ |
D | gles3.in | 243 …ufferRangeAEMU, GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access, void* mapped) 253 ## | | memcpy(mapped, hostptr, sz) 254 ## | stream->readback(mapped, sz) | 268 ## | | memcpy(mapped, hostptr, sz) 269 ## | stream->readback(mapped, sz) | 278 ## Make sure to store the binded range when mapped, I bet there is some dEQP test that checks this … 289 ## No need to consider mapped buffers here as that is a GL_INVALID_OPERATION :) 292 ## These buffer clears don't involve anything that can be mapped, so we are OK. 298 ## Reads (not writes) mapped state only, so shouldn't be sent to host. 301 # Get current mapped buffer pointer. Shouldn't be sent to host.
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D | gles3.attrib | 472 dir mapped out 473 len mapped length 474 var_flag mapped nullAllowed
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/device/linaro/bootloader/edk2/IntelFsp2WrapperPkg/ |
D | IntelFsp2WrapperPkg.dec | 58 ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.
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/device/linaro/bootloader/edk2/IntelFspWrapperPkg/ |
D | IntelFspWrapperPkg.dec | 57 ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.
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/device/linaro/bootloader/edk2/ArmPlatformPkg/ |
D | ArmPlatformPkg.dec | 44 # Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0.
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/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Dsdt/ |
D | PciHostBridge.asi | 78 DWORDMemory( // Consumed-and-produced resource for pci memory mapped memory
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/device/linaro/bootloader/arm-trusted-firmware/docs/ |
D | xlat-tables-lib-v2-design.rst | 307 the regions that are mapped at any given time. Whenever there is a request to 361 order of all regions at all times. As each new region is mapped, existing 388 that was not mapped in this translation regime and the library will have
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/device/amlogic/yukawa/ |
D | Generic.kl | 417 # Axes that are not mapped will be assigned generic axis numbers by the input subsystem.
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/device/google/atv/ |
D | Generic.kl | 415 # Axes that are not mapped will be assigned generic axis numbers by the input subsystem.
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