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Searched refs:tWCL (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
Dgen5_iosf_sb_definitions.h103 uint32_t tWCL :3; /**< bit [2:0] CAS Write Latency */ member
Dmeminit.c434 Dtr1.field.tWCL = WL - 3; //Convert from WL (DRAM clocks) to VLV indx in prog_ddr_timing_control()
473 …Dtr4.field.RDODTSTRT = Dtr1.field.tCMD + Dtr0.field.tCL - Dtr1.field.tWCL + 2; //Convert from WL (… in prog_ddr_timing_control()
474 Dtr4.field.RDODTSTOP = Dtr1.field.tCMD + Dtr0.field.tCL - Dtr1.field.tWCL + 2; in prog_ddr_timing_control()