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Searched refs:AMCNTENCLR0_EL0 (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darmv8.4a-actmon.s13 msr AMCNTENCLR0_EL0, x0
62 mrs x0, AMCNTENCLR0_EL0
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Darmv8.4a-actmon.txt98 #CHECK: msr AMCNTENCLR0_EL0, x0
143 #CHECK: mrs x0, AMCNTENCLR0_EL0
/external/arm-trusted-firmware/include/arch/aarch64/
Darch_helpers.h472 DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenclr0_el0, AMCNTENCLR0_EL0) in DEFINE_SYSREG_READ_FUNC()
Darch.h786 #define AMCNTENCLR0_EL0 S3_3_C13_C2_4 macro
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc838 AMCNTENCLR0_EL0 = 56980,
2665 { "AMCNTENCLR0_EL0", 0xDE94, true, true, {AArch64::HasV8_4aOps} }, // 683
2745 { "AMCNTENCLR0_EL0", 683 },
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td1254 def : RWSysReg<"AMCNTENCLR0_EL0", 0b11, 0b011, 0b1101, 0b0010, 0b100>;