Searched refs:AMEVCNTR11_EL0 (Results 1 – 6 of 6) sorted by relevance
| /external/arm-trusted-firmware/lib/extensions/amu/aarch64/ |
| D | amu_helpers.S | 107 read AMEVCNTR11_EL0 /* index 1 */
150 write AMEVCNTR11_EL0 /* index 1 */
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | armv8.4a-actmon.s | 26 msr AMEVCNTR11_EL0, x0
75 mrs x0, AMEVCNTR11_EL0
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-actmon.txt | 107 #CHECK: msr AMEVCNTR11_EL0, x0
156 #CHECK: mrs x0, AMEVCNTR11_EL0
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| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | arch.h | 805 #define AMEVCNTR11_EL0 S3_3_C13_C12_1 macro
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 851 AMEVCNTR11_EL0 = 57057,
2678 { "AMEVCNTR11_EL0", 0xDEE1, true, true, {AArch64::HasV8_4aOps} }, // 696
2761 { "AMEVCNTR11_EL0", 696 },
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1267 def : RWSysReg<"AMEVCNTR11_EL0", 0b11, 0b011, 0b1101, 0b1100, 0b001>;
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