Searched refs:AR71XX_DDR_CTRL_SIZE (Results 1 – 5 of 5) sorted by relevance
| /external/u-boot/arch/mips/mach-ath79/ar933x/ |
| D | ddr.c | 108 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_init()
241 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_tap_tuning()
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| /external/u-boot/arch/mips/mach-ath79/ar934x/ |
| D | ddr.c | 44 ddr_regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ar934x_ddr_init()
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| /external/u-boot/arch/mips/mach-ath79/qca953x/ |
| D | ddr.c | 224 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_init()
414 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_tap_tuning()
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| /external/u-boot/arch/mips/mach-ath79/qca956x/ |
| D | ddr.c | 190 void __iomem *ddr_regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in qca956x_ddr_init()
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| /external/u-boot/arch/mips/mach-ath79/include/mach/ |
| D | ar71xx_regs.h | 36 #define AR71XX_DDR_CTRL_SIZE 0x100 macro
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