| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetTransformInfo.cpp | 255 unsigned GCNTTIImpl::getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { in getLoadStoreVecRegBitWidth()
257 if (AddrSpace == AS.GLOBAL_ADDRESS || in getLoadStoreVecRegBitWidth()
258 AddrSpace == AS.CONSTANT_ADDRESS || in getLoadStoreVecRegBitWidth()
259 AddrSpace == AS.CONSTANT_ADDRESS_32BIT) { in getLoadStoreVecRegBitWidth()
263 if (AddrSpace == AS.FLAT_ADDRESS || in getLoadStoreVecRegBitWidth()
264 AddrSpace == AS.LOCAL_ADDRESS || in getLoadStoreVecRegBitWidth()
265 AddrSpace == AS.REGION_ADDRESS) in getLoadStoreVecRegBitWidth()
268 if (AddrSpace == AS.PRIVATE_ADDRESS) in getLoadStoreVecRegBitWidth()
276 unsigned AddrSpace) const { in isLegalToVectorizeMemChain()
280 if (AddrSpace == ST->getAMDGPUAS().PRIVATE_ADDRESS) { in isLegalToVectorizeMemChain()
[all …]
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| D | AMDGPUTargetTransformInfo.h | 146 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
150 unsigned AddrSpace) const;
153 unsigned AddrSpace) const;
156 unsigned AddrSpace) const;
229 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
231 unsigned AddrSpace) const;
234 unsigned AddrSpace) const;
237 unsigned AddrSpace) const;
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| D | SIMemoryLegalizer.cpp | 272 SIAtomicAddrSpace AddrSpace) const = 0;
286 SIAtomicAddrSpace AddrSpace,
298 SIAtomicAddrSpace AddrSpace,
329 SIAtomicAddrSpace AddrSpace) const override;
335 SIAtomicAddrSpace AddrSpace,
340 SIAtomicAddrSpace AddrSpace,
353 SIAtomicAddrSpace AddrSpace,
625 SIAtomicAddrSpace AddrSpace) const { in enableLoadCacheBypass()
629 if ((AddrSpace & SIAtomicAddrSpace::GLOBAL) != SIAtomicAddrSpace::NONE) { in enableLoadCacheBypass()
672 SIAtomicAddrSpace AddrSpace, in insertCacheInvalidate() argument
[all …]
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| D | AMDGPUTargetMachine.h | 64 uint64_t getNullPointerValue(unsigned AddrSpace) const { in getNullPointerValue() argument
65 if (AddrSpace == AS.LOCAL_ADDRESS || AddrSpace == AS.REGION_ADDRESS) in getNullPointerValue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetTransformInfo.h | 86 bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) { in hasVolatileVariant() argument
89 if (!(AddrSpace == llvm::ADDRESS_SPACE_GENERIC || in hasVolatileVariant()
90 AddrSpace == llvm::ADDRESS_SPACE_GLOBAL || in hasVolatileVariant()
91 AddrSpace == llvm::ADDRESS_SPACE_SHARED)) in hasVolatileVariant()
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| /external/llvm/include/llvm/IR/ |
| D | GetElementPtrTypeIterator.h | 32 unsigned AddrSpace; variable
36 static generic_gep_type_iterator begin(Type *Ty, unsigned AddrSpace, in begin() argument
41 I.AddrSpace = AddrSpace; in begin()
60 return CurTy.getPointer()->getPointerTo(AddrSpace);
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| /external/clang/include/clang/Basic/ |
| D | TargetInfo.h | 230 IntType getPtrDiffType(unsigned AddrSpace) const { in getPtrDiffType() argument
231 return AddrSpace == 0 ? PtrDiffType : getPtrDiffTypeV(AddrSpace); in getPtrDiffType()
290 uint64_t getPointerWidth(unsigned AddrSpace) const { in getPointerWidth() argument
291 return AddrSpace == 0 ? PointerWidth : getPointerWidthV(AddrSpace); in getPointerWidth()
293 uint64_t getPointerAlign(unsigned AddrSpace) const { in getPointerAlign() argument
294 return AddrSpace == 0 ? PointerAlign : getPointerAlignV(AddrSpace); in getPointerAlign()
996 virtual uint64_t getPointerWidthV(unsigned AddrSpace) const { in getPointerWidthV() argument
999 virtual uint64_t getPointerAlignV(unsigned AddrSpace) const { in getPointerAlignV() argument
1002 virtual enum IntType getPtrDiffTypeV(unsigned AddrSpace) const { in getPtrDiffTypeV() argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineMemOperand.h | 50 unsigned AddrSpace = 0; member
55 AddrSpace = v ? v->getType()->getPointerAddressSpace() : 0; in V()
61 AddrSpace = v ? v->getAddressSpace() : 0; in V()
66 AddrSpace(AddressSpace) {}
75 AddrSpace = ValPtr->getType()->getPointerAddressSpace(); in V()
77 AddrSpace = V.get<const PseudoSourceValue*>()->getAddressSpace(); in V()
83 return MachinePointerInfo(AddrSpace); in getWithOffset()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfo.h | 474 unsigned AddrSpace = 0,
513 bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const;
526 unsigned AddrSpace = 0) const;
935 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
946 unsigned AddrSpace) const;
951 unsigned AddrSpace) const;
1036 unsigned AddrSpace,
1047 virtual bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) = 0;
1051 int64_t Scale, unsigned AddrSpace) = 0;
1162 virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const = 0;
[all …]
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| D | TargetTransformInfoImpl.h | 237 unsigned AddrSpace, Instruction *I = nullptr) {
264 bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) { return false; } in hasVolatileVariant() argument
269 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) { in getScalingFactorCost() argument
272 Scale, AddrSpace)) in getScalingFactorCost()
533 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { return 128; } in getLoadStoreVecRegBitWidth() argument
541 unsigned AddrSpace) const { in isLegalToVectorizeLoadChain() argument
547 unsigned AddrSpace) const { in isLegalToVectorizeStoreChain() argument
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetTransformInfo.cpp | 83 unsigned AMDGPUTTIImpl::getLoadStoreVecRegBitWidth(unsigned AddrSpace) { in getLoadStoreVecRegBitWidth() argument
84 switch (AddrSpace) { in getLoadStoreVecRegBitWidth()
96 (AddrSpace == AMDGPUAS::PARAM_D_ADDRESS || in getLoadStoreVecRegBitWidth()
97 AddrSpace == AMDGPUAS::PARAM_I_ADDRESS || in getLoadStoreVecRegBitWidth()
98 (AddrSpace >= AMDGPUAS::CONSTANT_BUFFER_0 && in getLoadStoreVecRegBitWidth()
99 AddrSpace <= AMDGPUAS::CONSTANT_BUFFER_15))) in getLoadStoreVecRegBitWidth()
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| /external/llvm/lib/CodeGen/ |
| D | GlobalMerge.cpp | 141 Module &M, bool isConst, unsigned AddrSpace) const;
146 unsigned AddrSpace) const;
203 Module &M, bool isConst, unsigned AddrSpace) const { in doMerge()
216 return doMerge(Globals, AllGlobals, M, isConst, AddrSpace); in doMerge()
389 return doMerge(Globals, AllGlobals, M, isConst, AddrSpace); in doMerge()
413 Changed |= doMerge(Globals, UGS.Globals, M, isConst, AddrSpace); in doMerge()
421 unsigned AddrSpace) const { in doMerge()
452 "_MergedGlobals", nullptr, GlobalVariable::NotThreadLocal, AddrSpace); in doMerge()
473 GlobalAlias::create(Tys[idx], AddrSpace, Linkage, Name, GEP, &M); in doMerge()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | GlobalMerge.cpp | 160 Module &M, bool isConst, unsigned AddrSpace) const;
166 unsigned AddrSpace) const;
220 Module &M, bool isConst, unsigned AddrSpace) const { in doMerge()
233 return doMerge(Globals, AllGlobals, M, isConst, AddrSpace); in doMerge()
407 return doMerge(Globals, AllGlobals, M, isConst, AddrSpace); in doMerge()
431 Changed |= doMerge(Globals, UGS.Globals, M, isConst, AddrSpace); in doMerge()
439 unsigned AddrSpace) const { in doMerge()
516 GlobalVariable::NotThreadLocal, AddrSpace); in doMerge()
547 GlobalAlias *GA = GlobalAlias::create(Tys[StructIdxs[idx]], AddrSpace, in doMerge()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/ |
| D | DataLayout.cpp | 229 unsigned AddrSpace = getInt(R); in getAddrSpace() local
230 if (!isUInt<24>(AddrSpace)) in getAddrSpace()
232 return AddrSpace; in getAddrSpace()
278 unsigned AddrSpace = Tok.empty() ? 0 : getInt(Tok); in parseSpecifier() local
279 if (!isUInt<24>(AddrSpace)) in parseSpecifier()
322 setPointerAlignment(AddrSpace, PointerABIAlign, PointerPrefAlign, in parseSpecifier()
494 void DataLayout::setPointerAlignment(uint32_t AddrSpace, unsigned ABIAlign, in setPointerAlignment() argument
501 PointersTy::iterator I = findPointerLowerBound(AddrSpace); in setPointerAlignment()
502 if (I == Pointers.end() || I->AddressSpace != AddrSpace) { in setPointerAlignment()
503 Pointers.insert(I, PointerAlignElem::get(AddrSpace, ABIAlign, PrefAlign, in setPointerAlignment()
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| /external/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfo.h | 331 unsigned AddrSpace = 0) const;
352 unsigned AddrSpace = 0) const;
462 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
654 unsigned AddrSpace) = 0;
661 int64_t Scale, unsigned AddrSpace) = 0;
687 virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) = 0;
801 unsigned AddrSpace) override { in isLegalAddressingMode() argument
803 Scale, AddrSpace); in isLegalAddressingMode()
819 unsigned AddrSpace) override { in getScalingFactorCost() argument
821 Scale, AddrSpace); in getScalingFactorCost()
[all …]
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| D | TargetTransformInfoImpl.h | 206 unsigned AddrSpace) { in isLegalAddressingMode() argument
221 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) { in getScalingFactorCost() argument
224 Scale, AddrSpace)) in getScalingFactorCost()
281 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) { return 128; } in getLoadStoreVecRegBitWidth() argument
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.cpp | 92 unsigned &AddrSpace) const { in isLoadInstr()
98 AddrSpace = getLdStCodeAddrSpace(MI); in isLoadInstr()
103 unsigned &AddrSpace) const { in isStoreInstr()
109 AddrSpace = getLdStCodeAddrSpace(MI); in isStoreInstr()
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| D | NVPTXInstrInfo.h | 57 bool isLoadInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
58 bool isStoreInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
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| /external/llvm/lib/IR/ |
| D | DataLayout.cpp | 253 unsigned AddrSpace = Tok.empty() ? 0 : getInt(Tok); in parseSpecifier() local
254 if (!isUInt<24>(AddrSpace)) in parseSpecifier()
286 setPointerAlignment(AddrSpace, PointerABIAlign, PointerPrefAlign, in parseSpecifier()
437 void DataLayout::setPointerAlignment(uint32_t AddrSpace, unsigned ABIAlign, in setPointerAlignment() argument
444 PointersTy::iterator I = findPointerLowerBound(AddrSpace); in setPointerAlignment()
445 if (I == Pointers.end() || I->AddressSpace != AddrSpace) { in setPointerAlignment()
446 Pointers.insert(I, PointerAlignElem::get(AddrSpace, ABIAlign, PrefAlign, in setPointerAlignment()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| D | TargetTransformInfo.cpp | 148 unsigned AddrSpace, in isLegalAddressingMode() argument
151 Scale, AddrSpace, I); in isLegalAddressingMode()
187 unsigned AddrSpace) const { in hasVolatileVariant()
188 return TTIImpl->hasVolatileVariant(I, AddrSpace); in hasVolatileVariant()
199 unsigned AddrSpace) const { in getScalingFactorCost()
201 Scale, AddrSpace); in getScalingFactorCost()
595 unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const { in isLegalToVectorizeLoadChain()
597 AddrSpace); in isLegalToVectorizeLoadChain()
601 unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const { in isLegalToVectorizeStoreChain()
603 AddrSpace); in isLegalToVectorizeStoreChain()
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| /external/llvm/utils/TableGen/ |
| D | IntrinsicEmitter.cpp | 293 unsigned AddrSpace = 0; in EncodeFixedType() local
295 AddrSpace = R->getValueAsInt("AddrSpace"); in EncodeFixedType()
296 assert(AddrSpace < 256 && "Address space exceeds 255"); in EncodeFixedType()
298 if (AddrSpace) { in EncodeFixedType()
300 Sig.push_back(AddrSpace); in EncodeFixedType()
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| /external/llvm/lib/Analysis/ |
| D | TargetTransformInfo.cpp | 121 unsigned AddrSpace) const { in isLegalAddressingMode()
123 Scale, AddrSpace); in isLegalAddressingMode()
146 unsigned AddrSpace) const { in getScalingFactorCost()
148 Scale, AddrSpace); in getScalingFactorCost()
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | IntrinsicEmitter.cpp | 321 unsigned AddrSpace = 0; in EncodeFixedType() local
323 AddrSpace = R->getValueAsInt("AddrSpace"); in EncodeFixedType()
324 assert(AddrSpace < 256 && "Address space exceeds 255"); in EncodeFixedType()
326 if (AddrSpace) { in EncodeFixedType()
328 Sig.push_back(AddrSpace); in EncodeFixedType()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.h | 25 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.h | 25 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
|