| /external/perfetto/src/trace_processor/importers/fuchsia/ |
| D | fuchsia_trace_utils.h | 47 class ArgValue {
62 static ArgValue Null() { in Null()
63 ArgValue v; in Null()
69 static ArgValue Int32(int32_t value) { in Int32()
70 ArgValue v; in Int32()
76 static ArgValue Uint32(uint32_t value) { in Uint32()
77 ArgValue v; in Uint32()
83 static ArgValue Int64(int64_t value) { in Int64()
84 ArgValue v; in Int64()
90 static ArgValue Uint64(uint64_t value) { in Uint64()
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| D | fuchsia_trace_parser.cc | 55 fuchsia_trace_utils::ArgValue value;
168 arg.value = fuchsia_trace_utils::ArgValue::Null(); in ParseTracePacket()
171 arg.value = fuchsia_trace_utils::ArgValue::Int32( in ParseTracePacket()
175 arg.value = fuchsia_trace_utils::ArgValue::Uint32( in ParseTracePacket()
184 arg.value = fuchsia_trace_utils::ArgValue::Int64(value); in ParseTracePacket()
193 arg.value = fuchsia_trace_utils::ArgValue::Uint64(value); in ParseTracePacket()
202 arg.value = fuchsia_trace_utils::ArgValue::Double(value); in ParseTracePacket()
219 arg.value = fuchsia_trace_utils::ArgValue::String(value); in ParseTracePacket()
228 arg.value = fuchsia_trace_utils::ArgValue::Pointer(value); in ParseTracePacket()
237 arg.value = fuchsia_trace_utils::ArgValue::Koid(value); in ParseTracePacket()
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| D | fuchsia_trace_utils.cc | 66 Variadic ArgValue::ToStorageVariadic(TraceStorage* storage) const { in ToStorageVariadic()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/ |
| D | Nios2ISelLowering.cpp | 117 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments() local
129 ArgValue = in LowerFormalArguments()
130 DAG.getNode(Opcode, DL, RegVT, ArgValue, DAG.getValueType(ValVT)); in LowerFormalArguments()
131 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, ValVT, ArgValue); in LowerFormalArguments()
137 ArgValue = DAG.getNode(ISD::BITCAST, DL, ValVT, ArgValue); in LowerFormalArguments()
138 InVals.push_back(ArgValue); in LowerFormalArguments()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | LowerExpectIntrinsic.cpp | 65 Value *ArgValue = CI->getArgOperand(0); in handleSwitchExpect() local
82 SI.setCondition(ArgValue); in handleSwitchExpect()
117 Value *ArgValue = CI->getArgOperand(0); in handleBranchExpect() local
135 CmpI->setOperand(0, ArgValue); in handleBranchExpect()
137 BI.setCondition(ArgValue); in handleBranchExpect()
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| /external/clang/include/clang/Frontend/ |
| D | CommandLineSourceLoc.h | 65 inline bool parse(Option &O, StringRef ArgName, StringRef ArgValue,
71 parse(Option &O, StringRef ArgName, StringRef ArgValue, in parse() argument
75 Val = ParsedSourceLocation::FromString(ArgValue); in parse()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | LowerExpectIntrinsic.cpp | 66 Value *ArgValue = CI->getArgOperand(0); in handleSwitchExpect() local
83 SI.setCondition(ArgValue); in handleSwitchExpect()
277 Value *ArgValue = CI->getArgOperand(0); in handleBrSelExpect() local
294 CmpI->setOperand(0, ArgValue); in handleBrSelExpect()
296 BSI.setCondition(ArgValue); in handleBrSelExpect()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 184 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerFormalArguments() local
190 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
193 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
197 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
199 InVals.push_back(ArgValue); in LowerFormalArguments()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 999 SDValue ArgValue; in LowerFormalArguments() local
1003 ArgValue = unpackF64OnRV32DSoftABI(DAG, Chain, VA, DL); in LowerFormalArguments()
1005 ArgValue = unpackFromRegLoc(DAG, Chain, VA, DL); in LowerFormalArguments()
1007 ArgValue = unpackFromMemLoc(DAG, Chain, VA, DL); in LowerFormalArguments()
1013 InVals.push_back(DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, in LowerFormalArguments()
1020 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, in LowerFormalArguments()
1028 InVals.push_back(ArgValue); in LowerFormalArguments()
1074 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, XLenVT); in LowerFormalArguments() local
1077 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, in LowerFormalArguments()
1249 SDValue ArgValue = OutVals[i]; in LowerCall() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 242 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerFormalArguments() local
247 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
250 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
254 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
256 InVals.push_back(ArgValue); in LowerFormalArguments()
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| /external/v8/src/libplatform/tracing/ |
| D | trace-writer.cc | 59 TraceObject::ArgValue value) { in AppendArgValue()
166 TraceObject::ArgValue* arg_values = trace_event->arg_values(); in AppendTraceEvent()
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| D | trace-writer.h | 23 void AppendArgValue(uint8_t type, TraceObject::ArgValue value);
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| /external/clang/lib/ASTMatchers/Dynamic/ |
| D | Parser.cpp | 368 ParserValue ArgValue; in parseMatcherExpressionImpl() local
369 ArgValue.Text = Tokenizer->peekNextToken().Text; in parseMatcherExpressionImpl()
370 ArgValue.Range = Tokenizer->peekNextToken().Range; in parseMatcherExpressionImpl()
371 if (!parseExpressionImpl(&ArgValue.Value)) { in parseMatcherExpressionImpl()
375 Args.push_back(ArgValue); in parseMatcherExpressionImpl()
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| /external/v8/include/libplatform/ |
| D | v8-tracing.h | 39 union ArgValue { union
80 ArgValue* arg_values() { return arg_values_; } in arg_values()
102 ArgValue arg_values_[kTraceMaxNumArgs];
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1057 SDValue ArgValue; in LowerFormalArguments() local
1073 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
1087 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1090 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
1092 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1095 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
1097 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1101 InVals.push_back(ArgValue); in LowerFormalArguments()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 449 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments() local
455 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
458 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
462 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
464 InVals.push_back(ArgValue); in LowerCCCArguments()
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| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 390 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { in EmitVAStartEnd() argument
392 if (ArgValue->getType() != DestType) in EmitVAStartEnd()
393 ArgValue = in EmitVAStartEnd()
394 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); in EmitVAStartEnd()
397 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); in EmitVAStartEnd()
508 Value *ArgValue = EmitScalarExpr(E->getArg(0)); in EmitBuiltinExpr() local
510 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); in EmitBuiltinExpr()
512 Builder.CreateICmpSGE(ArgValue, in EmitBuiltinExpr()
513 llvm::Constant::getNullValue(ArgValue->getType()), in EmitBuiltinExpr()
516 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); in EmitBuiltinExpr()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 465 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments() local
471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
480 InVals.push_back(ArgValue); in LowerCCCArguments()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 449 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments() local
455 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
458 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
462 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
464 InVals.push_back(ArgValue); in LowerCCCArguments()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 631 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments() local
637 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
640 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
644 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
646 InVals.push_back(ArgValue); in LowerCCCArguments()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 3381 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments() local
3383 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
3390 ArgValue = DAG.getNode(ISD::BITCAST, DL, ValVT, ArgValue); in LowerFormalArguments()
3397 std::swap(ArgValue, ArgValue2); in LowerFormalArguments()
3398 ArgValue = DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, in LowerFormalArguments()
3399 ArgValue, ArgValue2); in LowerFormalArguments()
3402 InVals.push_back(ArgValue); in LowerFormalArguments()
3424 SDValue ArgValue = DAG.getLoad( in LowerFormalArguments() local
3427 OutChains.push_back(ArgValue.getValue(1)); in LowerFormalArguments()
3429 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 3087 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments() local
3089 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
3096 ArgValue = DAG.getNode(ISD::BITCAST, DL, ValVT, ArgValue); in LowerFormalArguments()
3103 std::swap(ArgValue, ArgValue2); in LowerFormalArguments()
3104 ArgValue = DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, in LowerFormalArguments()
3105 ArgValue, ArgValue2); in LowerFormalArguments()
3108 InVals.push_back(ArgValue); in LowerFormalArguments()
3130 SDValue ArgValue = DAG.getLoad( in LowerFormalArguments() local
3134 OutChains.push_back(ArgValue.getValue(1)); in LowerFormalArguments()
3136 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 887 SDValue ArgValue; in LowerFormalArguments() local
925 ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); in LowerFormalArguments()
940 ArgValue = DAG.getLoad(LocVT, DL, Chain, FIN, in LowerFormalArguments()
949 ArgValue, MachinePointerInfo(), in LowerFormalArguments()
958 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, in LowerFormalArguments()
966 InVals.push_back(convertLocVTToValVT(DAG, DL, VA, Chain, ArgValue)); in LowerFormalArguments()
995 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f64); in LowerFormalArguments() local
996 MemOps[I] = DAG.getStore(ArgValue.getValue(1), DL, ArgValue, FIN, in LowerFormalArguments()
1078 SDValue ArgValue = OutVals[I]; in LowerCall() local
1085 Chain, DL, ArgValue, SpillSlot, in LowerCall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 1111 SDValue ArgValue; in LowerFormalArguments() local
1149 ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); in LowerFormalArguments()
1164 ArgValue = DAG.getLoad(LocVT, DL, Chain, FIN, in LowerFormalArguments()
1171 InVals.push_back(DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, in LowerFormalArguments()
1180 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, in LowerFormalArguments()
1187 InVals.push_back(convertLocVTToValVT(DAG, DL, VA, Chain, ArgValue)); in LowerFormalArguments()
1216 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f64); in LowerFormalArguments() local
1217 MemOps[I] = DAG.getStore(ArgValue.getValue(1), DL, ArgValue, FIN, in LowerFormalArguments()
1296 SDValue ArgValue = OutVals[I]; in LowerCall() local
1303 DAG.getStore(Chain, DL, ArgValue, SpillSlot, in LowerCall()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1526 Value *ArgValue = CLI.OutVals[i]; in fastLowerCall() local
1527 Type *ArgTy = ArgValue->getType(); in fastLowerCall()
1535 unsigned Arg = getRegForValue(ArgValue); in fastLowerCall()
1539 Args.push_back(ArgValue); in fastLowerCall()
|