| /external/v8/src/codegen/ppc/ |
| D | assembler-ppc.cc | 614 emit(instr | frt.code() * B21 | fra.code() * B16 | frb.code() * B11 | r); in a_form()
632 emit(instr | rt.code() * B21 | ra.code() * B16 | (kImm16Mask & val)); in d_form()
637 emit(instr | rt.code() * B21 | ra.code() * B16 | rb.code() * B11 | o | r); in xo_form()
647 emit(instr | rs.code() * B21 | ra.code() * B16 | sh0_4 * B11 | m0_4 * B6 | in md_form()
656 emit(instr | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | m0_4 * B6 | in mds_form()
737 emit(RLWINMX | rs.code() * B21 | ra.code() * B16 | sh * B11 | mb * B6 | in rlwinm()
745 emit(RLWNMX | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | mb * B6 | in rlwnm()
754 emit(RLWIMIX | rs.code() * B21 | ra.code() * B16 | sh * B11 | mb * B6 | in rlwimi()
808 emit(EXT2 | ADDZEX | dst.code() * B21 | src1.code() * B16 | o | r); in addze()
903 emit(CMPI | cr.code() * B23 | L * B21 | src1.code() * B16 | imm16); in cmpi()
[all …]
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| D | assembler-ppc.h | 369 emit(instr | f1 * B21 | f2 * B16 | f3 * B11 | rc); in x_form()
373 emit(instr | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | rc); in x_form()
377 emit(instr | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | eh);
386 emit(instr | cr.code() * B23 | L * B21 | s1.code() * B16 | s2.code() * B11 | in x_form()
414 emit(EXT2 | EXTSW | ra.code() * B21 | rs.code() * B16 | rc);
440 emit(instr | (t.code() & 0x1F) * B21 | (b.code() & 0x1F) * B11 | BX * B1 | in xx2_form()
460 emit(instr | (t.code() & 0x1F) * B21 | (a.code() & 0x1F) * B16 |
484 emit(instr | rt.code() * B21 | imm.immediate() * B16 | rb.code() * B11);
488 emit(instr | rt.code() * B21 | ra.code() * B16 | rb.code() * B11); in vx_form()
491 emit(instr | rt.code() * B21 | rb.code() * B11); in vx_form()
[all …]
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| D | constants-ppc.h | 2670 B21 = 1 << 21, enumerator
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 57 static constexpr IValueT B21 = 1 << 21; variable
1122 constexpr IValueT VmovssOpcode = B23 | B21 | B20 | B6; in emitMoveSS()
1258 B24 | B23 | B21 | B20 | B19 | B17 | B16 | B10 | B9 | Opcode; in emitSIMDCvtqq()
1389 const IValueT Encoding = (CondARM32::AL << kConditionShift) | B24 | B21 | in bkpt()
1437 int32_t Encoding = (encodeCondition(Cond) << kConditionShift) | B24 | B21 | in blx()
1449 B21 | (0xfff << 8) | B4 | in bx()
1471 B24 | B22 | B21 | (0xF << 16) | (0xf << 8) | B4; in clz()
1521 B21 | B20 | B19 | B18 | B17 | B16 | B15 | B14 | B13 | B12 | B6 | B4 | in dmb()
1848 B24 | B21 | B15 | B14 | B13 | B12; in nop()
2080 constexpr IValueT MlaOpcode = B21; in mla()
[all …]
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| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 329 B24 | B22 | B21 | (0xf << 16) |
391 EmitMulOp(cond, B21, ra, rd, rn, rm);
400 EmitMulOp(cond, B22 | B21, ra, rd, rn, rm);
426 EmitMulOp(cond, B23 | B21, rd_lo, rd_hi, rn, rm); in umlal()
474 EmitDivOp(cond, B21 , rd, rn, rm);
595 B26 | B24 | B22 | B21 | B20 | (0xff << 12) | B4 | 0xf; in clrex()
604 B25 | B24 | B21 | (0xf << 12);
698 (i*B21) |
924 EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm);
929 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm);
[all …]
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| D | assembler_arm.h | 64 B21 = 1 << 21,
610 return (AL << kConditionShift) | B24 | B21 |
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/ADCE/ |
| D | 2016-09-06.ll | 20 br i1 %I10, label %B11, label %B21
44 br label %B21
46 B21:
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | bv-widen-undef.ll | 16 %B21 = mul <2 x i8> %Shuff12, <i8 -1, i8 -1>
21 %I36 = insertelement <2 x i8> %B21, i8 %0, i32 0
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | bv-widen-undef.ll | 16 %B21 = mul <2 x i8> %Shuff12, <i8 -1, i8 -1>
21 %I36 = insertelement <2 x i8> %B21, i8 %0, i32 0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Generic/ |
| D | dag-combine-ossfuzz-crash.ll | 22 %B21 = urem i1 %C11, true
47 store i1 %B21, i1* undef
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
| D | and-or-icmps.ll | 231 %B21 = sdiv i16 %L7, %L4
232 %B7 = sub i16 0, %B21
237 %C5 = icmp sle i16 %B21, %L
238 %C11 = icmp ule i16 %B21, %L
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| /external/v8/src/codegen/arm/ |
| D | assembler-arm.cc | 495 const Instr kBlxRegPattern = B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | BLX;
497 const Instr kMovMvnMask = 0x6D * B21 | 0xF * B16;
498 const Instr kMovMvnPattern = 0xD * B21;
504 const Instr kMovwLeaveCCFlip = 0x5 * B21;
505 const Instr kMovImmedMask = 0x7F * B21;
506 const Instr kMovImmedPattern = 0x1D * B21;
507 const Instr kOrrImmedMask = 0x7F * B21;
508 const Instr kOrrImmedPattern = 0x1C * B21;
511 const Instr kCmpCmnFlip = B21;
512 const Instr kAddSubFlip = 0x6 * B21;
[all …]
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| D | constants-arm.h | 177 B21 = 1 << 21, enumerator
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 237 def B21 : AArch64Reg<21, "b21">, DwarfRegNum<[85]>;
271 def H21 : AArch64Reg<21, "h21", [B21]>, DwarfRegAlias<B21>;
306 def S21 : AArch64Reg<21, "s21", [H21]>, DwarfRegAlias<B21>;
341 def D21 : AArch64Reg<21, "d21", [S21], ["v21", ""]>, DwarfRegAlias<B21>;
376 def Q21 : AArch64Reg<21, "q21", [D21], ["v21", ""]>, DwarfRegAlias<B21>;
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| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 133 case AArch64::D21: return AArch64::B21; in getBRegFromDReg()
173 case AArch64::B21: return AArch64::D21; in getDRegFromBReg()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 133 case AArch64::D21: return AArch64::B21; in getBRegFromDReg()
173 case AArch64::B21: return AArch64::D21; in getDRegFromBReg()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | known-bits.ll | 87 %B21 = udiv i8 %Sl9, -93
91 %I40 = insertelement <4 x i8> zeroinitializer, i8 %B21, i32 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 256 def B21 : AArch64Reg<21, "b21">, DwarfRegNum<[85]>;
290 def H21 : AArch64Reg<21, "h21", [B21]>, DwarfRegAlias<B21>;
325 def S21 : AArch64Reg<21, "s21", [H21]>, DwarfRegAlias<B21>;
360 def D21 : AArch64Reg<21, "d21", [S21], ["v21", ""]>, DwarfRegAlias<B21>;
395 def Q21 : AArch64Reg<21, "q21", [D21], ["v21", ""]>, DwarfRegAlias<B21>;
|
| /external/protobuf/python/google/protobuf/internal/ |
| D | more_messages.proto | 125 message B21 {} message
|
| /external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/ |
| D | device1.ini | 92 B21=0x00000000 key
|
| /external/OpenCSD/decoder/tests/snapshots/a57_single_step/ |
| D | device1.ini | 92 B21=0x00000000 key
|
| /external/icu/icu4c/source/data/unidata/norm2/ |
| D | nfc.txt | 749 0B5C>0B21 0B3C
2140 2F8EF>6B21
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 352 AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 393 AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 50 B21 = 30,
2200 { AArch64::B21 },
2293 …h64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArc…
3537 { 85U, AArch64::B21 },
3654 { 85U, AArch64::B21 },
3729 { AArch64::B21, 85U },
4008 { AArch64::B21, 85U },
19336 …h64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArc…
19338 …h64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArc…
|