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Searched refs:BRAB (Results 1 – 13 of 13) sorted by relevance

/external/vixl/src/aarch64/
Dcpu-features-auditor-aarch64.cc1176 case BRAB: in VisitUnconditionalBranchToRegister()
Dconstants-aarch64.h729 BRAB = UnconditionalBranchToRegisterFixed | 0x011F0C00, enumerator
Dsimulator-aarch64.cc1120 case BRAB: in GetBTypeFromInstruction()
1160 case BRAB: in VisitUnconditionalBranchToRegister()
Ddisasm-aarch64.cc701 case BRAB: in VisitUnconditionalBranchToRegister()
Dassembler-aarch64.cc242 Emit(BRAB | Rn(xn) | RdSP(xm)); in brab()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenMCCodeEmitter.inc347 UINT64_C(3609136128), // BRAB
9327 case AArch64::BRAB: {
12399 Feature_HasV8_3a | 0, // BRAB = 334
DAArch64GenAsmWriter.inc1146 2248197114U, // BRAB
5665 1U, // BRAB
10827 // ABSv1i64, ADR, AUTDA, AUTDB, AUTIA, AUTIB, BLRAA, BLRAB, BRAA, BRAB, C...
DAArch64GenAsmWriter1.inc2095 201427448U, // BRAB
6614 2U, // BRAB
DAArch64GenInstrInfo.inc349 BRAB = 334,
6236 …UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr }, // Inst #334 = BRAB
DAArch64GenAsmMatcher.inc12209 …{ 299 /* brab */, AArch64::BRAB, Convert__Reg1_0__Reg1_1, Feature_HasV8_3a, { MCK_GPR64, MCK_GPR64…
18678 …{ 299 /* brab */, AArch64::BRAB, Convert__Reg1_0__Reg1_1, Feature_HasV8_3a, { MCK_GPR64, MCK_GPR64…
DAArch64GenDisassemblerTables.inc14196 /* 69471 */ MCD::OPC_Decode, 206, 2, 254, 2, // Opcode: BRAB
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md392 ### BRAB ### subsection
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td567 def BRAB : AuthBranchTwoOperands<0, 1, "brab">;