Searched refs:BaseR (Results 1 – 6 of 6) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVExtract.cpp | 57 unsigned genElemLoad(MachineInstr *ExtI, unsigned BaseR,
67 unsigned HexagonVExtract::genElemLoad(MachineInstr *ExtI, unsigned BaseR, in genElemLoad() argument
84 .addReg(BaseR) in genElemLoad()
95 .addReg(BaseR) in genElemLoad()
148 unsigned BaseR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in runOnMachineFunction() local
149 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::PS_fi), BaseR) in runOnMachineFunction()
153 unsigned ElemR = genElemLoad(ExtI, BaseR, MRI); in runOnMachineFunction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86FixupLEAs.cpp | 482 unsigned int BaseR = Base.getReg(); in processInstrForSlow3OpLEA() local
487 bool IsInefficientBase = isInefficientLEAReg(BaseR); in processInstrForSlow3OpLEA()
492 if (IsInefficientBase && SSDstR == BaseR && !IsScale1) in processInstrForSlow3OpLEA()
509 if (IsScale1 && (DstR == BaseR || DstR == IndexR)) { in processInstrForSlow3OpLEA()
510 const MachineOperand &Src = DstR == BaseR ? Index : Base; in processInstrForSlow3OpLEA()
542 assert(SSDstR != BaseR && "SSDstR == BaseR should be handled already!"); in processInstrForSlow3OpLEA()
547 bool BIK = Base.isKill() && BaseR != IndexR; in processInstrForSlow3OpLEA()
548 TII->copyPhysReg(*MFI, MI, DL, DstR, BaseR, BIK); in processInstrForSlow3OpLEA()
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| /external/clang/lib/StaticAnalyzer/Core/ |
| D | Store.cpp | 329 if (const CXXBaseObjectRegion *BaseR = dyn_cast<CXXBaseObjectRegion>(MR)) { in evalDynamicCast() local
331 MR = BaseR->getSuperRegion(); in evalDynamicCast()
393 const MemRegion* BaseR = nullptr; in getLValueFieldOrIvar() local
397 BaseR = BaseL.castAs<loc::MemRegionVal>().getRegion(); in getLValueFieldOrIvar()
418 return loc::MemRegionVal(MRMgr.getObjCIvarRegion(ID, BaseR)); in getLValueFieldOrIvar()
420 return loc::MemRegionVal(MRMgr.getFieldRegion(cast<FieldDecl>(D), BaseR)); in getLValueFieldOrIvar()
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| D | RegionStore.cpp | 711 const MemRegion *BaseR = E; in RunWorkList() local
713 static_cast<DERIVED*>(this)->VisitCluster(BaseR, getCluster(BaseR)); in RunWorkList()
720 void VisitCluster(const MemRegion *BaseR, const ClusterBindings *C, in VisitCluster() argument
722 static_cast<DERIVED*>(this)->VisitCluster(BaseR, C); in VisitCluster()
970 const MemRegion *BaseR = doNotInvalidateSuperRegion ? R : R->getBaseRegion(); in AddToWorkList() local
971 return AddToWorkList(WorkListElement(BaseR), getCluster(BaseR)); in AddToWorkList()
2302 const MemRegion *BaseR = R->getBaseRegion(); in AddToWorkList() local
2303 return AddToWorkList(WorkListElement(BaseR), getCluster(BaseR)); in AddToWorkList()
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| /external/ethtool/shell-completion/bash/ |
| D | ethtool | 997 [baser]=BaseR
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringARM32.cpp | 2148 Variable *BaseR = legalizeToReg(NewBase); in hiOperand() local
2150 return OperandARM32Mem::create(Func, SplitType, BaseR, IndexR, in hiOperand()
2174 Variable *BaseR = legalizeToReg(Base); in hiOperand() local
2175 return OperandARM32Mem::create(Func, SplitType, BaseR, Offset, in hiOperand()
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