/external/tensorflow/tensorflow/core/kernels/ |
D | cwise_op_div.cc | 19 REGISTER6(BinaryOp, CPU, "Div", functor::div, float, Eigen::half, double, 21 REGISTER5(BinaryOp, CPU, "Div", functor::safe_div, uint8, uint16, int16, int32, 23 REGISTER5(BinaryOp, CPU, "TruncateDiv", functor::safe_div, uint8, uint16, int16, 25 REGISTER6(BinaryOp, CPU, "RealDiv", functor::div, float, Eigen::half, double, 27 REGISTER5(BinaryOp, CPU, "DivNoNan", functor::div_no_nan, Eigen::half, float, 32 REGISTER9(BinaryOp, GPU, "Div", functor::div, float, Eigen::half, double, uint8, 34 REGISTER4(BinaryOp, GPU, "TruncateDiv", functor::div, uint8, uint16, int16, 36 REGISTER5(BinaryOp, GPU, "RealDiv", functor::div, float, Eigen::half, double, 38 REGISTER5(BinaryOp, GPU, "DivNoNan", functor::div_no_nan, Eigen::half, float, 50 BinaryOp<CPUDevice, functor::safe_div<int32>>); [all …]
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D | cwise_op_add_1.cc | 19 REGISTER6(BinaryOp, CPU, "Add", functor::add, float, Eigen::half, double, int32, 21 REGISTER6(BinaryOp, CPU, "AddV2", functor::add, float, Eigen::half, double, 25 REGISTER3(BinaryOp, GPU, "Add", functor::add, float, Eigen::half, double); 26 REGISTER3(BinaryOp, GPU, "AddV2", functor::add, float, Eigen::half, double); 37 BinaryOp<CPUDevice, functor::add<int32>>); 44 BinaryOp<CPUDevice, functor::add<int32>>); 49 REGISTER(BinaryOp, SYCL, "Add", functor::add, type); \ 50 REEGISTER(BinaryOp, SYCL, "AddV2", functor::add, type); 60 BinaryOp<CPUDevice, functor::add<int32>>); 67 BinaryOp<CPUDevice, functor::add<int32>>);
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D | cwise_op_mul_1.cc | 20 REGISTER6(BinaryOp, CPU, "Mul", functor::mul, float, Eigen::half, double, uint8, 22 REGISTER5(BinaryOp, CPU, "MulNoNan", functor::mul_no_nan, Eigen::half, float, 29 REGISTER(BinaryOp, CPU, "Mul", functor::mul, int32); 33 REGISTER4(BinaryOp, GPU, "Mul", functor::mul, Eigen::half, float, double, 44 BinaryOp<CPUDevice, functor::mul<int32>>); 48 REGISTER5(BinaryOp, GPU, "MulNoNan", functor::mul_no_nan, Eigen::half, float, 53 REGISTER3(BinaryOp, SYCL, "Mul", functor::mul, float, double, uint8); 60 BinaryOp<CPUDevice, functor::mul<int32>>);
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D | cwise_op_sub.cc | 19 REGISTER8(BinaryOp, CPU, "Sub", functor::sub, float, Eigen::half, double, int32, 23 REGISTER4(BinaryOp, CPU, "Sub", functor::sub, int8, uint8, int16, uint16); 28 REGISTER(BinaryOp, CPU, "Sub", functor::sub, int32); 32 REGISTER6(BinaryOp, GPU, "Sub", functor::sub, float, Eigen::half, double, int64, 44 BinaryOp<CPUDevice, functor::sub<int32>>); 48 REGISTER3(BinaryOp, SYCL, "Sub", functor::sub, float, double, int64); 55 BinaryOp<CPUDevice, functor::sub<int32>>);
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D | cwise_op_igammas.cc | 20 REGISTER2(BinaryOp, CPU, "Igamma", functor::igamma, float, double); 21 REGISTER2(BinaryOp, CPU, "IgammaGradA", functor::igamma_grad_a, float, double); 22 REGISTER2(BinaryOp, CPU, "Igammac", functor::igammac, float, double); 24 REGISTER2(BinaryOp, GPU, "Igamma", functor::igamma, float, double); 25 REGISTER2(BinaryOp, GPU, "IgammaGradA", functor::igamma_grad_a, float, double); 26 REGISTER2(BinaryOp, GPU, "Igammac", functor::igammac, float, double);
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D | cwise_op_mod.cc | 19 REGISTER2(BinaryOp, CPU, "Mod", functor::safe_mod, int32, int64); 20 REGISTER2(BinaryOp, CPU, "Mod", functor::fmod, float, double); 21 REGISTER2(BinaryOp, CPU, "TruncateMod", functor::safe_mod, int32, int64); 22 REGISTER2(BinaryOp, CPU, "TruncateMod", functor::fmod, float, double); 34 BinaryOp<CPUDevice, functor::safe_mod<int32>>); 41 BinaryOp<CPUDevice, functor::safe_mod<int32>>);
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D | cwise_op_less.cc | 19 REGISTER5(BinaryOp, CPU, "Less", functor::less, float, Eigen::half, double, 21 REGISTER4(BinaryOp, CPU, "Less", functor::less, int64, uint8, int8, int16); 24 REGISTER7(BinaryOp, GPU, "Less", functor::less, float, Eigen::half, double, 36 BinaryOp<CPUDevice, functor::less<int32>>); 39 REGISTER3(BinaryOp, SYCL, "Less", functor::less, float, double, int64); 46 BinaryOp<CPUDevice, functor::less<int32>>);
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D | cwise_op_less_equal.cc | 19 REGISTER5(BinaryOp, CPU, "LessEqual", functor::less_equal, float, Eigen::half, 21 REGISTER4(BinaryOp, CPU, "LessEqual", functor::less_equal, int64, uint8, int8, 25 REGISTER7(BinaryOp, GPU, "LessEqual", functor::less_equal, float, Eigen::half, 37 BinaryOp<CPUDevice, functor::less_equal<int32>>); 41 REGISTER6(BinaryOp, SYCL, "LessEqual", functor::less_equal, float, double, 49 BinaryOp<CPUDevice, functor::less_equal<int32>>);
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D | cwise_op_floor_div.cc | 19 REGISTER6(BinaryOp, CPU, "FloorDiv", functor::safe_floor_div, uint8, uint16, 21 REGISTER3(BinaryOp, CPU, "FloorDiv", functor::floor_div_real, float, 25 REGISTER4(BinaryOp, GPU, "FloorDiv", functor::floor_div, uint8, uint16, int16, 27 REGISTER3(BinaryOp, GPU, "FloorDiv", functor::floor_div_real, float, 41 BinaryOp<CPUDevice, functor::safe_floor_div<int32>>); 51 BinaryOp<CPUDevice, functor::safe_floor_div<int32>>);
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D | cwise_op_maximum.cc | 19 REGISTER6(BinaryOp, CPU, "Maximum", functor::maximum, float, Eigen::half, 22 REGISTER4(BinaryOp, GPU, "Maximum", functor::maximum, float, Eigen::half, 34 BinaryOp<CPUDevice, functor::maximum<int32>>); 38 REGISTER3(BinaryOp, SYCL, "Maximum", functor::maximum, float, double, int64); 45 BinaryOp<CPUDevice, functor::maximum<int32>>);
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D | cwise_op_not_equal_to_1.cc | 19 REGISTER7(BinaryOp, CPU, "NotEqual", functor::not_equal_to, float, Eigen::half, 22 REGISTER4(BinaryOp, GPU, "NotEqual", functor::not_equal_to, float, Eigen::half, 33 BinaryOp<CPUDevice, functor::not_equal_to<int32>>); 37 REGISTER2(BinaryOp, SYCL, "NotEqual", functor::not_equal_to, float, double); 45 BinaryOp<CPUDevice, functor::not_equal_to<int32>>);
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D | cwise_op_minimum.cc | 19 REGISTER6(BinaryOp, CPU, "Minimum", functor::minimum, float, Eigen::half, 22 REGISTER4(BinaryOp, GPU, "Minimum", functor::minimum, float, Eigen::half, 34 BinaryOp<CPUDevice, functor::minimum<int32>>); 38 REGISTER3(BinaryOp, SYCL, "Minimum", functor::minimum, float, double, int64); 45 BinaryOp<CPUDevice, functor::minimum<int32>>);
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D | cwise_op_squared_difference.cc | 19 REGISTER7(BinaryOp, CPU, "SquaredDifference", functor::squared_difference, 22 REGISTER4(BinaryOp, GPU, "SquaredDifference", functor::squared_difference, 36 BinaryOp<CPUDevice, functor::squared_difference<int32>>); 39 REGISTER3(BinaryOp, SYCL, "SquaredDifference", functor::squared_difference, 48 BinaryOp<CPUDevice, functor::squared_difference<int32>>);
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D | cwise_op_greater_equal.cc | 19 REGISTER9(BinaryOp, CPU, "GreaterEqual", functor::greater_equal, float, 22 REGISTER7(BinaryOp, GPU, "GreaterEqual", functor::greater_equal, float, 34 BinaryOp<CPUDevice, functor::greater_equal<int32>>); 38 REGISTER2(BinaryOp, SYCL, "GreaterEqual", functor::greater_equal, float, 47 BinaryOp<CPUDevice, functor::greater_equal<int32>>);
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D | cwise_op_greater.cc | 19 REGISTER9(BinaryOp, CPU, "Greater", functor::greater, float, Eigen::half, 22 REGISTER7(BinaryOp, GPU, "Greater", functor::greater, float, Eigen::half, 34 BinaryOp<CPUDevice, functor::greater<int32>>); 37 REGISTER2(BinaryOp, SYCL, "Greater", functor::greater, float, double); 45 BinaryOp<CPUDevice, functor::greater<int32>>);
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D | cwise_op_equal_to_1.cc | 19 REGISTER7(BinaryOp, CPU, "Equal", functor::equal_to, float, Eigen::half, double, 28 REGISTER4(BinaryOp, GPU, "Equal", functor::equal_to, float, Eigen::half, double, 46 BinaryOp<CPUDevice, functor::equal_to<int32>>); 50 REGISTER5(BinaryOp, SYCL, "Equal", functor::equal_to, float, double, uint8, 58 BinaryOp<CPUDevice, functor::equal_to<int32>>);
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D | cwise_op_zeta.cc | 19 REGISTER2(BinaryOp, CPU, "Zeta", functor::zeta, float, double); 20 REGISTER2(BinaryOp, CPU, "Polygamma", functor::polygamma, float, double); 23 REGISTER2(BinaryOp, GPU, "Zeta", functor::zeta, float, double); 24 REGISTER2(BinaryOp, GPU, "Polygamma", functor::polygamma, float, double);
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D | cwise_op_pow.cc | 19 REGISTER5(BinaryOp, CPU, "Pow", functor::pow, float, Eigen::half, double, 21 REGISTER2(BinaryOp, CPU, "Pow", functor::safe_pow, int32, int64); 24 REGISTER4(BinaryOp, GPU, "Pow", functor::pow, float, Eigen::half, double, 28 REGISTER2(BinaryOp, SYCL, "Pow", functor::pow, float, double);
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D | cwise_op_add_2.cc | 25 REGISTER6(BinaryOp, CPU, "Add", functor::add, int8, int16, complex64, uint8, 29 REGISTER5(BinaryOp, CPU, "AddV2", functor::add, int8, int16, complex64, uint8, 32 REGISTER4(BinaryOp, GPU, "Add", functor::add, uint8, int64, complex64, 34 REGISTER4(BinaryOp, GPU, "AddV2", functor::add, uint8, int64, complex64,
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D | cwise_op_floor_mod.cc | 19 REGISTER2(BinaryOp, CPU, "FloorMod", functor::safe_floor_mod, int32, int64); 20 REGISTER2(BinaryOp, CPU, "FloorMod", functor::floor_fmod, float, double); 32 BinaryOp<CPUDevice, functor::safe_floor_mod<int32>>); 42 BinaryOp<CPUDevice, functor::safe_floor_mod<int32>>);
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/external/eigen/Eigen/src/Core/ |
D | CwiseBinaryOp.h | 17 template<typename BinaryOp, typename Lhs, typename Rhs> 18 struct traits<CwiseBinaryOp<BinaryOp, Lhs, Rhs> > 34 BinaryOp( 41 BinaryOp>::ret StorageKind; 54 template<typename BinaryOp, typename Lhs, typename Rhs, typename StorageKind> 76 template<typename BinaryOp, typename LhsType, typename RhsType> 79 BinaryOp, LhsType, RhsType, 82 BinaryOp>::ret>, 87 typedef typename internal::remove_all<BinaryOp>::type Functor; 92 BinaryOp, LhsType, RhsType, [all …]
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/external/eigen/Eigen/src/SparseCore/ |
D | SparseCwiseBinaryOp.h | 35 template<typename BinaryOp, typename Lhs, typename Rhs> 36 class CwiseBinaryOpImpl<BinaryOp, Lhs, Rhs, Sparse> 37 : public SparseMatrixBase<CwiseBinaryOp<BinaryOp, Lhs, Rhs> > 40 typedef CwiseBinaryOp<BinaryOp, Lhs, Rhs> Derived; 59 template<typename BinaryOp, typename Lhs, typename Rhs> 60 struct binary_evaluator<CwiseBinaryOp<BinaryOp, Lhs, Rhs>, IteratorBased, IteratorBased> 61 : evaluator_base<CwiseBinaryOp<BinaryOp, Lhs, Rhs> > 66 typedef CwiseBinaryOp<BinaryOp, Lhs, Rhs> XprType; 122 const BinaryOp& m_functor; 129 …t = evaluator<Lhs>::CoeffReadCost + evaluator<Rhs>::CoeffReadCost + functor_traits<BinaryOp>::Cost, [all …]
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/external/python/pycparser/tests/ |
D | test_c_ast.py | 14 b1 = c_ast.BinaryOp( 50 b1 = c_ast.BinaryOp( 60 b2 = c_ast.BinaryOp( 65 b3 = c_ast.BinaryOp( 79 b1 = c_ast.BinaryOp( 84 b2 = c_ast.BinaryOp( 102 b1 = c_ast.BinaryOp( 107 b2 = c_ast.BinaryOp(
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/external/eigen/Eigen/src/Core/functors/ |
D | BinaryFunctors.h | 440 template<typename BinaryOp> struct bind1st_op : BinaryOp { 442 typedef typename BinaryOp::first_argument_type first_argument_type; 443 typedef typename BinaryOp::second_argument_type second_argument_type; 444 typedef typename BinaryOp::result_type result_type; 448 …t result_type operator() (const second_argument_type& b) const { return BinaryOp::operator()(m_val… 452 { return BinaryOp::packetOp(internal::pset1<Packet>(m_value), b); } 456 template<typename BinaryOp> struct functor_traits<bind1st_op<BinaryOp> > : functor_traits<BinaryOp>… 459 template<typename BinaryOp> struct bind2nd_op : BinaryOp { 461 typedef typename BinaryOp::first_argument_type first_argument_type; 462 typedef typename BinaryOp::second_argument_type second_argument_type; [all …]
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/external/tensorflow/tensorflow/compiler/mlir/lite/transforms/ |
D | optimize_patterns.td | 116 multiclass FuseMulOrDivWithConv2dOrDepthwiseConv2d<dag BinaryOp> { 117 def : Pat<(BinaryOp (TFL_DepthwiseConv2DOp:$output $input, 125 (BinaryOp (ConstantOp $filter), 129 (BinaryOp (ConstantOp $bias), 137 def : Pat<(BinaryOp (TFL_Conv2DOp:$conv_output $input, 144 (BinaryOp (ConstantOp $filter), 147 (BinaryOp (ConstantOp $bias), 156 foreach BinaryOp = [TFL_DivOp, TFL_MulOp] in 157 defm : FuseMulOrDivWithConv2dOrDepthwiseConv2d<BinaryOp>; 279 multiclass FuseTileBroadcastIntoFollowingBinary<dag BinaryOp> { [all …]
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