/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/PacketRules/ |
D | endloop_branches.s | 5 # CHECK: 4:1: error: Branches cannot be in a packet with hardware loops 9 # CHECK: 8:1: error: Branches cannot be in a packet with hardware loops 13 # CHECK: 12:1: error: Branches cannot be in a packet with hardware loops 17 # CHECK: 16:1: error: Branches cannot be in a packet with hardware loops
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/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-cov/Inputs/ |
D | test_-b_-f.output | 33 Branches executed:100.00% of 4 39 Branches executed:100.00% of 11 55 Branches executed:100.00% of 15
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D | test_-b.output | 9 Branches executed:100.00% of 15
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/external/llvm/test/tools/llvm-cov/Inputs/ |
D | test_-b_-f.output | 33 Branches executed:100.00% of 4 39 Branches executed:100.00% of 11 55 Branches executed:100.00% of 15
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D | test_-b.output | 3 Branches executed:100.00% of 15
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_emulate_branches.c | 52 struct branch_info * Branches; member 64 s->Branches, s->BranchCount, s->BranchReserved, 1); in handle_if() 68 branch = &s->Branches[s->BranchCount++]; in handle_if() 99 branch = &s->Branches[s->BranchCount - 1]; in handle_else() 210 branch = &s->Branches[s->BranchCount - 1]; in handle_endif()
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D | r500_fragprog_emit.c | 80 struct branch_info * Branches; member 547 s->Branches, s->CurrentBranchDepth, s->BranchesReserved, 1); in emit_flowcontrol() 549 branch = &s->Branches[s->CurrentBranchDepth++]; in emit_flowcontrol() 566 branch = &s->Branches[s->CurrentBranchDepth - 1]; in emit_flowcontrol() 578 branch = &s->Branches[s->CurrentBranchDepth - 1]; in emit_flowcontrol()
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/external/llvm/lib/IR/ |
D | GCOV.cpp | 732 ++Coverage.Branches; in printBranchInfo() 741 ++FuncCoverage.Branches; in printBranchInfo() 765 if (Coverage.Branches) { in printCoverage() 767 double(Coverage.BranchesExec) * 100 / Coverage.Branches, in printCoverage() 768 Coverage.Branches); in printCoverage() 770 double(Coverage.BranchesTaken) * 100 / Coverage.Branches, in printCoverage() 771 Coverage.Branches); in printCoverage()
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/external/clang/lib/CodeGen/ |
D | CGCleanup.h | 254 llvm::SmallPtrSet<llvm::BasicBlock*, 4> Branches; member 360 bool hasBranches() const { return ExtInfo && !ExtInfo->Branches.empty(); } in hasBranches() 376 if (ExtInfo.Branches.insert(Block).second) in addBranchAfter() 411 return getExtInfo().Branches.insert(Block).second; in addBranchThrough() 417 return (ExtInfo->BranchAfters.size() != ExtInfo->Branches.size()); in hasBranchThroughs()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/ProfileData/ |
D | GCOV.cpp | 754 ++Coverage.Branches; in printBranchInfo() 763 ++FuncCoverage.Branches; in printBranchInfo() 787 if (Coverage.Branches) { in printCoverage() 789 double(Coverage.BranchesExec) * 100 / Coverage.Branches, in printCoverage() 790 Coverage.Branches); in printCoverage() 792 double(Coverage.BranchesTaken) * 100 / Coverage.Branches, in printCoverage() 793 Coverage.Branches); in printCoverage()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
D | ARCBranchFinalize.cpp | 146 std::vector<MachineInstr *> Branches; in runOnMachineFunction() local 164 Branches.push_back(&MI); in runOnMachineFunction()
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCChecker.cpp | 274 unsigned Branches = 0, Returns = 0, NewIndirectBranches = 0, in checkBranches() local 286 ++Branches; in checkBranches() 306 if (Branches) // FIXME: should "Defs.count(Hexagon::PC)" be here too? in checkBranches() 314 if (Branches > 1) in checkBranches()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
D | valid.s | 3 # Branches have some unusual encoding rules in MIPS32r6 so we need to test:
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/ |
D | valid.s | 3 # Branches have some unusual encoding rules in MIPS32r6 so we need to test:
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/external/llvm/test/MC/Mips/mips64r6/ |
D | valid.s | 3 # Branches have some unusual encoding rules in MIPS32r6 so we need to test:
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/external/llvm/test/MC/Mips/mips32r6/ |
D | valid.s | 3 # Branches have some unusual encoding rules in MIPS32r6 so we need to test:
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/external/llvm/include/llvm/Target/ |
D | GenericOpcodes.td | 35 // Branches.
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/external/clang/include/clang/Analysis/Analyses/ |
D | ThreadSafetyTIL.h | 1428 Branches[0] = T; in Branch() 1429 Branches[1] = E; in Branch() 1433 Branches[0] = T; in Branch() 1434 Branches[1] = E; in Branch() 1440 const BasicBlock *thenBlock() const { return Branches[0]; } in thenBlock() 1441 BasicBlock *thenBlock() { return Branches[0]; } in thenBlock() 1443 const BasicBlock *elseBlock() const { return Branches[1]; } in elseBlock() 1444 BasicBlock *elseBlock() { return Branches[1]; } in elseBlock() 1448 return llvm::makeArrayRef(Branches); in successors() 1454 BasicBlock *Ntb = Vs.reduceBasicBlockRef(Branches[0]); in traverse() [all …]
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/external/llvm/include/llvm/Support/ |
D | GCOV.h | 384 : Name(Name), LogicalLines(0), LinesExec(0), Branches(0), in GCOVCoverage() 392 uint32_t Branches; member
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/external/skqp/site/dev/tools/ |
D | codesearch.md | 31 Code search option |Search |XRef |History |Repos |Branches |Freshness
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/external/skia/site/dev/tools/ |
D | codesearch.md | 31 Code search option |Search |XRef |History |Repos |Branches |Freshness
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/external/angle/doc/ |
D | ChoosingANGLEBranch.md | 11 Branches are created automatically in ANGLE to correspond to branches created in
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ProfileData/ |
D | GCOV.h | 406 uint32_t Branches = 0; member
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/external/catch2/docs/ |
D | contributing.md | 12 ## Branches section in Contributing to Catch
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/external/mesa3d/docs/ |
D | repository.rst | 101 Development Branches
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