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Searched refs:CNTCR_OFF (Results 1 – 12 of 12) sorted by relevance

/external/arm-trusted-firmware/plat/socionext/uniphier/
Duniphier_bl31_setup.c76 mmio_write_32(UNIPHIER_SYS_CNTCTL_BASE + CNTCR_OFF, in bl31_platform_setup()
/external/arm-trusted-firmware/plat/renesas/rcar/
Dbl31_plat_setup.c112 mmio_write_32(RCAR_CNTC_BASE + CNTCR_OFF, CNTCR_FCREQ(U(0)) | CNTCR_EN); in bl31_platform_setup()
Dbl2_plat_setup.c1051 mmio_setbits_32(RCAR_CNTC_BASE + (uintptr_t)CNTCR_OFF, in bl2_init_generic_timer()
/external/arm-trusted-firmware/plat/arm/common/sp_min/
Darm_sp_min_setup.c197 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in sp_min_platform_setup()
/external/arm-trusted-firmware/plat/layerscape/common/
Dls_bl31_setup.c173 mmio_write_32(LS1043_SYS_CNTCTL_BASE + CNTCR_OFF, in ls_bl31_platform_setup()
/external/arm-trusted-firmware/plat/imx/imx7/common/
Dimx7_bl2_el3_common.c130 mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, in imx7_setup_system_counter()
/external/arm-trusted-firmware/plat/socionext/synquacer/
Dsq_bl31_setup.c145 mmio_write_32(SQ_SYS_CNTCTL_BASE + CNTCR_OFF, in bl31_platform_setup()
/external/arm-trusted-firmware/plat/arm/common/
Darm_bl31_setup.c223 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in arm_bl31_platform_setup()
/external/arm-trusted-firmware/plat/arm/board/fvp/
Dfvp_common.c426 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in fvp_timer_init()
/external/arm-trusted-firmware/drivers/st/clk/
Dstm32mp1_clk.c1541 mmio_clrbits_32(stgen + CNTCR_OFF, CNTCR_EN); in stm32mp1_stgen_config()
1549 mmio_setbits_32(stgen + CNTCR_OFF, CNTCR_EN); in stm32mp1_stgen_config()
1569 mmio_clrbits_32(stgen + CNTCR_OFF, CNTCR_EN); in stm32mp1_stgen_increment()
1572 mmio_setbits_32(stgen + CNTCR_OFF, CNTCR_EN); in stm32mp1_stgen_increment()
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h83 #define CNTCR_OFF U(0x000) macro
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h101 #define CNTCR_OFF U(0x000) macro