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Searched refs:CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD (Results 1 – 14 of 14) sorted by relevance

/external/u-boot/board/is1/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/terasic/de10-nano/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/aries/mcvevk/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/ebv/socrates/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/altera/arria5-socdk/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/devboards/dbm-soc1/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/terasic/de1-soc/qts/
Dsdram_config.h48 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/softing/vining_fpga/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/terasic/de0-nano-soc/qts/
Dsdram_config.h32 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/sr1500/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/terasic/sockit/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/board/altera/cyclone5-socdk/qts/
Dsdram_config.h44 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 macro
/external/u-boot/arch/arm/mach-socfpga/
Dwrap_sdram_config.c66 (CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD <<
/external/u-boot/scripts/
Dconfig_whitelist.txt792 CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD