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Searched refs:CP0_WATCHHI (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/cpu/
Dstart.S40 mtc0 t1, CP0_WATCHHI,\sel
41 mfc0 t0, CP0_WATCHHI,\sel
195 mtc0 zero, CP0_WATCHHI
/external/u-boot/arch/mips/include/asm/
Dmipsregs.h63 #define CP0_WATCHHI $19 macro