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Searched refs:CRL_APB_PL1_REF_CTRL (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/drivers/clk/
Dclk_zynqmp.c77 #define CRL_APB_PL1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xa4) macro
231 return CRL_APB_PL1_REF_CTRL; in zynqmp_clk_get_register()
/external/arm-trusted-firmware/plat/xilinx/zynqmp/include/
Dzynqmp_def.h317 #define CRL_APB_PL1_REF_CTRL (CRL_APB_CLK_BASE + 0xa4) macro
/external/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/
Dpm_api_clock.c1914 .control_reg = CRL_APB_PL1_REF_CTRL,