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Searched refs:CondCode (Results 1 – 25 of 172) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h850 enum CondCode { enum
883 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
889 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
896 inline bool isTrueWhenEqual(CondCode Cond) { in isTrueWhenEqual()
903 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
909 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
913 CondCode getSetCCSwappedOperands(CondCode Operation);
918 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
923 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
DAnalysis.h89 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
93 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
98 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h913 enum CondCode { enum
946 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
952 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
959 inline bool isTrueWhenEqual(CondCode Cond) { in isTrueWhenEqual()
966 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
972 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
976 CondCode getSetCCSwappedOperands(CondCode Operation);
981 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
986 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
DAnalysis.h89 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
93 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
98 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ConditionOptimizer.cpp102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
229 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
243 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
274 AArch64CC::CondCode Cmp; in modifyCmp()
305 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
309 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
319 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
376 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
[all …]
DAArch64InstructionSelector.cpp504 static AArch64CC::CondCode changeICMPPredToAArch64CC(CmpInst::Predicate P) { in changeICMPPredToAArch64CC()
532 AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC() argument
533 AArch64CC::CondCode &CondCode2) { in changeFCMPPredToAArch64CC()
539 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
542 CondCode = AArch64CC::GT; in changeFCMPPredToAArch64CC()
545 CondCode = AArch64CC::GE; in changeFCMPPredToAArch64CC()
548 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
551 CondCode = AArch64CC::LS; in changeFCMPPredToAArch64CC()
554 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
558 CondCode = AArch64CC::VC; in changeFCMPPredToAArch64CC()
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/external/llvm/lib/Target/AArch64/
DAArch64ConditionOptimizer.cpp95 typedef std::tuple<int, unsigned, AArch64CC::CondCode> CmpInfo;
101 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
103 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
218 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
232 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
263 AArch64CC::CondCode Cmp; in modifyCmp()
294 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
298 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
308 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
365 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
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/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.cpp38 enum CondCode { enum
134 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
147 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
158 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
213 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
234 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
288 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch()
297 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch()
405 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in ReverseBranchCondition()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/
DXCoreInstrInfo.cpp38 enum CondCode { enum
134 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
147 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
158 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
213 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
234 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
299 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
407 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in reverseBranchCondition()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/
DLanaiCondCode.h10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
DLanaiInstrInfo.cpp124 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
352 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
372 LPCC::CondCode CC; in optimizeCompareInstr()
373 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
376 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
523 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
525 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
527 NewMI.addImm(CondCode); in optimizeSelect()
626 LPCC::CondCode BranchCond = in analyzeBranch()
627 static_cast<LPCC::CondCode>(Instruction->getOperand(1).getImm()); in analyzeBranch()
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/external/llvm/lib/Target/Lanai/
DLanaiCondCode.h10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
DLanaiInstrInfo.cpp125 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
353 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
373 LPCC::CondCode CC; in optimizeCompareInstr()
374 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
377 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
525 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
527 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
529 NewMI.addImm(CondCode); in optimizeSelect()
628 LPCC::CondCode BranchCond = in analyzeBranch()
629 static_cast<LPCC::CondCode>(Instruction->getOperand(1).getImm()); in analyzeBranch()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrInfo.h41 enum CondCode { enum
72 unsigned GetCondBranchFromCond(CondCode CC);
76 std::pair<CondCode, bool> getX86ConditionCode(CmpInst::Predicate Predicate);
80 unsigned getSETFromCond(CondCode CC, bool HasMemoryOperand = false);
84 unsigned getCMovFromCond(CondCode CC, unsigned RegBytes,
88 CondCode getCondFromBranchOpc(unsigned Opc);
91 CondCode getCondFromSETOpc(unsigned Opc);
94 CondCode getCondFromCMovOpc(unsigned Opc);
98 CondCode GetOppositeBranchCondition(CondCode CC);
101 unsigned getVPCMPImmForCond(ISD::CondCode CC);
DX86FlagsCopyLowering.cpp111 DebugLoc TestLoc, X86::CondCode Cond);
115 X86::CondCode Cond, CondRegArray &CondRegs);
733 X86::CondCode Cond = X86::getCondFromSETOpc(MI.getOpcode()); in collectCondsInRegs()
751 DebugLoc TestLoc, X86::CondCode Cond) { in promoteCondToReg()
763 DebugLoc TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) { in getCondOrInverseInReg()
791 X86::CondCode Cond; in rewriteArithmetic()
845 X86::CondCode Cond = X86::getCondFromCMovOpc(CMovI.getOpcode()); in rewriteCMov()
870 X86::CondCode Cond = X86::getCondFromBranchOpc(JmpI.getOpcode()); in rewriteCondJmp()
1029 X86::CondCode Cond = X86::getCondFromSETOpc(SetCCI.getOpcode()); in rewriteSetCC()
/external/llvm/lib/Target/X86/
DX86InstrInfo.h33 enum CondCode { enum
64 unsigned GetCondBranchFromCond(CondCode CC);
68 unsigned getSETFromCond(CondCode CC, bool HasMemoryOperand = false);
72 unsigned getCMovFromCond(CondCode CC, unsigned RegBytes,
76 CondCode getCondFromCMovOpc(unsigned Opc);
80 CondCode GetOppositeBranchCondition(CondCode CC);
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_inlines.h26 static inline CondCode reverseCondCode(CondCode cc) in reverseCondCode()
30 return static_cast<CondCode>(ccRev[cc & 7] | (cc & ~7)); in reverseCondCode()
33 static inline CondCode inverseCondCode(CondCode cc) in inverseCondCode()
35 return static_cast<CondCode>(cc ^ 7); in inverseCondCode()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h193 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
214 inline static const char *getCondCodeName(CondCode Code) { in getCondCodeName()
236 inline static CondCode getInvertedCondCode(CondCode Code) { in getInvertedCondCode()
239 return static_cast<CondCode>(static_cast<unsigned>(Code) ^ 0x1); in getInvertedCondCode()
246 inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) { in getNZCVToSatisfyCondCode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h193 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
214 inline static const char *getCondCodeName(CondCode Code) { in getCondCodeName()
236 inline static CondCode getInvertedCondCode(CondCode Code) { in getInvertedCondCode()
239 return static_cast<CondCode>(static_cast<unsigned>(Code) ^ 0x1); in getInvertedCondCode()
246 inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) { in getNZCVToSatisfyCondCode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/InstPrinter/
DLanaiInstPrinter.cpp287 LPCC::CondCode CC = in printCCOperand()
288 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printCCOperand()
298 LPCC::CondCode CC = in printPredicateOperand()
299 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printPredicateOperand()
/external/llvm/lib/Target/Mips/InstPrinter/
DMipsInstPrinter.h33 enum CondCode { enum
73 const char *MipsFCCToString(Mips::CondCode CC);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/InstPrinter/
DMipsInstPrinter.h33 enum CondCode { enum
73 const char *MipsFCCToString(Mips::CondCode CC);
/external/llvm/lib/Target/Lanai/InstPrinter/
DLanaiInstPrinter.cpp287 LPCC::CondCode CC = in printCCOperand()
288 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printCCOperand()
298 LPCC::CondCode CC = in printPredicateOperand()
299 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printPredicateOperand()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td590 class CondCode; // ISD::CondCode enums
591 def SETOEQ : CondCode; def SETOGT : CondCode;
592 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
593 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
594 def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
595 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
597 def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode;
598 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/InstPrinter/
DARCInstPrinter.cpp50 static const char *ARCCondCodeToString(ARCCC::CondCode CC) { in ARCCondCodeToString()
167 O << ARCCondCodeToString((ARCCC::CondCode)Op.getImm()); in printPredicateOperand()

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