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Searched refs:DDR1_CONF_REG_VAL (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c48 #define DDR1_CONF_REG_VAL (DDR_TRAS(16) | DDR_TRCD(6) | \ macro
246 writel(DDR1_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG); in ddr_init()