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Searched refs:DDR1_MODE_DLL_VAL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/ar933x/
Dddr.c96 #define DDR1_MODE_DLL_VAL 0x133 macro
195 writel(DDR1_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c182 #define DDR1_MODE_DLL_VAL 0x133 macro
266 writel(DDR1_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()