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Searched refs:DDR2_TAP_VAL (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c187 #define DDR2_TAP_VAL 0x10 macro
402 writel(DDR2_TAP_VAL, regs + AR71XX_DDR_REG_TAP_CTRL0); in ddr_init()
405 writel(DDR2_TAP_VAL, regs + AR71XX_DDR_REG_TAP_CTRL1); in ddr_init()