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Searched refs:DDR3_INC_LVL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/
Demif.h536 #define DDR3_INC_LVL ((DDR3_WR_LVL_INT << EMIF_REG_WRLVLINC_INT_SHIFT) \ macro
/external/u-boot/arch/arm/mach-omap2/
Demif-common.c248 writel(DDR3_INC_LVL, &emif->emif_rd_wr_lvl_ctl); in omap5_ddr3_leveling()