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Searched refs:DDR_CTRL_AUTO_REFRESH (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c17 #define DDR_CTRL_AUTO_REFRESH BIT(2) macro
278 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
280 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
368 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
370 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
/external/u-boot/arch/mips/mach-ath79/ar933x/
Dddr.c17 #define DDR_CTRL_AUTO_REFRESH BIT(2) macro
152 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
153 writel(DDR_CTRL_AUTO_REFRESH, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()