Home
last modified time | relevance | path

Searched refs:DDR_REG_BIST_COMP_AHB_GE1_0 (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c194 #define DDR_REG_BIST_COMP_AHB_GE1_0 0x40 macro
430 writel(0xffff, regs + DDR_REG_BIST_COMP_AHB_GE1_0); in ddr_tap_tuning()