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/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-ext.txt3 # FIXME: decode as beqlr 0
7 # FIXME: decode as beqlr 1
11 # FIXME: decode as beqlr 2
15 # FIXME: decode as beqlr 3
19 # FIXME: decode as beqlr 4
23 # FIXME: decode as beqlr 5
27 # FIXME: decode as beqlr 6
31 # FIXME: decode as beqlr 7
299 # FIXME: decode as bltlr 2
303 # FIXME: decode as bltlr 0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-ext.txt3 # FIXME: decode as beqlr 0
7 # FIXME: decode as beqlr 1
11 # FIXME: decode as beqlr 2
15 # FIXME: decode as beqlr 3
19 # FIXME: decode as beqlr 4
23 # FIXME: decode as beqlr 5
27 # FIXME: decode as beqlr 6
31 # FIXME: decode as beqlr 7
299 # FIXME: decode as bltlr 2
303 # FIXME: decode as bltlr 0
[all …]
/external/u-boot/arch/arm/dts/
Dzynqmp-p-a2197-00-revA.dts39 /* xlnx,fmc-eeprom = FIXME */
138 reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */
146 reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */
150 reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */
154 reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */
158 reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */
168 /* FIXME check alerts coming to SC */
195 reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */
199 reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */
203 reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */
[all …]
Dzynqmp-m-a2197-01-revA.dts44 reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */
92 xlnx,mio_bank = <0>; /* FIXME tap delay */
174 /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */
301 i2c@3 { /* MEM PMBUS - FIXME bug in schematics */
334 /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */
340 eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */
347 reg = <0x5d>; /* FIXME addr */
349 factory-fout = <156250000>; /* FIXME every chip can be different */
351 clock-output-names = "REF_CLK"; /* FIXME */
371 input; /* FIXME add meaning */
[all …]
Dzynqmp-m-a2197-03-revA.dts44 reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */
88 xlnx,mio_bank = <0>; /* FIXME tap delay */
166 /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */
198 reg = <0x17>; /* FIXME wrong in schematics */
290 i2c@3 { /* MEM PMBUS - FIXME bug in schematics */
327 /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */
333 eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */
340 reg = <0x5d>; /* FIXME addr */
342 factory-fout = <156250000>; /* FIXME every chip can be different */
344 clock-output-names = "REF_CLK"; /* FIXME */
[all …]
Dzynqmp-m-a2197-02-revA.dts44 reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */
88 xlnx,mio_bank = <0>; /* FIXME tap delay */
166 /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */
198 reg = <0x17>; /* FIXME wrong in schematics */
290 i2c@3 { /* MEM PMBUS - FIXME bug in schematics */
337 /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */
343 eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */
350 reg = <0x5d>; /* FIXME addr */
352 factory-fout = <156250000>; /* FIXME every chip can be different */
354 clock-output-names = "REF_CLK"; /* FIXME */
[all …]
/external/llvm/test/MC/PowerPC/
Dppc64-encoding.s285 # FIXME: Fixed-point move assist instructions
301 # FIXME: addo 2, 3, 4
302 # FIXME: addo. 2, 3, 4
309 # FIXME: subfo 2, 3, 4
310 # FIXME: subfo. 2, 3, 4
327 # FIXME: addco 2, 3, 4
328 # FIXME: addco. 2, 3, 4
335 # FIXME: subfco 2, 3, 4
336 # FIXME: subfco. 2, 3, 4
344 # FIXME: addeo 2, 3, 4
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding.s326 # FIXME: Fixed-point move assist instructions
342 # FIXME: addo 2, 3, 4
343 # FIXME: addo. 2, 3, 4
350 # FIXME: subfo 2, 3, 4
351 # FIXME: subfo. 2, 3, 4
368 # FIXME: addco 2, 3, 4
369 # FIXME: addco. 2, 3, 4
376 # FIXME: subfco 2, 3, 4
377 # FIXME: subfco. 2, 3, 4
385 # FIXME: addeo 2, 3, 4
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/utils/docker/example/
DDockerfile13 # FIXME: Replace 'ubuntu' with your base image
15 # FIXME: Change maintainer name
17 # FIXME: Install llvm/clang build dependencies here. Including compiler to
32 # FIXME: Replace 'ubuntu' with your base image.
34 # FIXME: Change maintainer name.
36 # FIXME: Install all packages you want to have in your release container.
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Delf_header.s19 # FIXME: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips1 -target-abi=o32 …
20 # FIXME: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips2 -target-abi=o32 …
21 # FIXME: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips3 -target-abi=o32 …
22 # FIXME: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips4 -target-abi=o32 …
23 # FIXME: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips5 -target-abi=o32 …
24 # FIXME: llvm-mc -filetype=obj -triple mips64-unknown-linux -target-abi=o32 …
25 # FIXME: llvm-mc -filetype=obj -triple mips64el-unknown-linux -target-abi=o32 …
26 # FIXME: llvm-mc -filetype=obj -triple mips64el-unknown-linux -target-abi=o32 …
27 # FIXME: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips32r2 -target-abi=o32 …
28 # FIXME: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips32r3 -target-abi=o32 …
[all …]
Dexpansion-jal-sym-pic.s199 # O32-FIXME: lw $25, %got(forward_local)($gp) # encoding: [0x8f,0x99,A,A]
200 # O32-FIXME: # fixup A - offset: 0, value…
201 # O32-FIXME: addiu $25, $25, %lo(forward_local) # encoding: [0x27,0x39,A,A]
202 # O32-FIXME:: # fixup A - offset: 0, valu…
209 # N32-FIXME: lw $25, %got_disp(forward_local)($gp) # encoding: [0x8f,0x99,A,A]
210 # N32-FIXME: # fixup A - offset: 0, value: %got…
215 # N64-FIXME: ld $25, %got_disp(forward_local)($gp) # encoding: [0xdf,0x99,A,A]
216 # N64-FIXME: # fixup A - offset: 0, value: %got…
221 # O32-MM-FIXME: lw $25, %got(forward_local)($gp) # encoding: [0xff,0x3c,A,A]
222 # O32-MM-FIXME: # fixup A - offset: 0, value: %got…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Demangle/
Dms-mangle.test15 ; FIXME: Reference Temporaries
156 ; FIXME: We don't support blocks yet.
159 ; FIXME: void eta(int (^)(int, int))
161 ; FIXME: void theta(int(int,int)^ block)
181 ; FIXME-EXTRACONST: These tests fails because we print an extra const inside the parens.
183 ; FIXME-EXTRACONST: double const (*color3)[3]
186 ; FIXME-EXTRACONST: double const (*color4)[3]
268 ; FIXME: We don't properly support extern "C" functions yet.
270 ; FIXME: int `extern_c_func'::`2'::local
273 ; FIXME: int `extern_c_func'::`2'::local
[all …]
Dms-arg-qualifiers.test128 ; FIXME: We don't support rvalue references yet
131 ; FIXME: void __cdecl foo_qay144h(int (&&)[5][5])
133 ; FIXME: We don't support rvalue references yet
136 ; FIXME: void __cdecl foo_qay144cbh(int const (&&)[5][5])
146 ; FIXME: We don't support rvalue references yet
149 ; FIXME: void __cdecl foo_q6ahxz(int (__cdecl &&)(void))
189 ; FIXME: void __cdecl foo_fnptrbackref1(void (__cdecl *)(int *const), void (__cdecl *)(int *const))
193 ; FIXME: void __cdecl foo_fnptrbackref2(void (__cdecl *)(int *const), void (__cdecl *)(int *const))
197 ; FIXME: void __cdecl foo_fnptrbackref3(void (*)(int *const), void (*)(int *))
201 ; FIXME: void __cdecl foo_fnptrbackref4(void (*)(int *), void (*)(int *const))
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-movi.ll45 ; FIXME: Prefer movz, so it prints as "mov".
55 ; FIXME: Prefer "movz" instead (so we print as "mov").
114 ; FIXME: Prefer "mov w0, #2863311530; lsl x0, x0, #4"
126 ; FIXME: prefer "mov x0, #-16639; lsl x0, x0, #24"
137 ; FIXME: prefer "mov w0, #-63; movk x0, #17, lsl #32"
327 ; FIXME: prefer "mov x0, #2147483646; orr x0, x0, #36028659580010496"
356 ; FIXME: prefer "mov x0, #72340172838076673; and x0, x0, #2199023255296"
367 ; FIXME: prefer "mov w0, #-1431655766; movk x0, #9, lsl #32"
378 ; FIXME: prefer "mov w0, #-13690; orr x0, x0, #0x1111111111111111"
389 ; FIXME: prefer "mov w0, #-305397761; eor x0, x0, #0x3333333333333333"
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dftrunc.ll32 ; FIXME-FUNC-LABEL: {{^}}ftrunc_v3f32:
33 ; FIXME-EG: TRUNC
34 ; FIXME-EG: TRUNC
35 ; FIXME-EG: TRUNC
36 ; FIXME-SI: v_trunc_f32_e32
37 ; FIXME-SI: v_trunc_f32_e32
38 ; FIXME-SI: v_trunc_f32_e32
Dspill-m0.ll70 ; FIXME: RegScavenger::isRegUsed() always returns true if m0 is reserved, so we have to save and re…
71 ; FIXME-TOSMEM-NOT: m0
73 ; FIXME-TOSMEM-NOT: m0
76 ; FIXME-TOSMEM-NOT: m0
162 ; FIXME: RegScavenger::isRegUsed() always returns true if m0 is reserved, so we have to save and re…
163 ; FIXME-TOSMEM-NOT: m0
166 ; FIXME-TOSMEM-NOT: m0
169 ; FIXME-TOSMEM-NOT: m0
182 ; FIXME-TOSMEM-NOT: m0
185 ; FIXME-TOSMEM-NOT: m0
/external/llvm/test/CodeGen/AMDGPU/
Dftrunc.ll32 ; FIXME-FUNC-LABEL: {{^}}ftrunc_v3f32:
33 ; FIXME-EG: TRUNC
34 ; FIXME-EG: TRUNC
35 ; FIXME-EG: TRUNC
36 ; FIXME-SI: v_trunc_f32_e32
37 ; FIXME-SI: v_trunc_f32_e32
38 ; FIXME-SI: v_trunc_f32_e32
/external/clang/test/Analysis/
Dproperties.m660 [_ownedProp release]; // FIXME-warning{{used after it is released}}
666 [_unownedProp release]; // FIXME-warning{{not owned at this point by the caller}}
673 [_ivarOnly release]; // FIXME-warning{{used after it is released}}
680 [_readonlyProp release]; // FIXME-warning{{used after it is released}}
687 [_implicitManualProp release]; // FIXME-warning{{used after it is released}}
693 [_implicitSynthProp release]; // FIXME-warning{{not owned at this point by the caller}}
700 CFRelease(_cfProp); // FIXME-warning{{used after it is released}}
707 [_ownedProp myMethod]; // FIXME-warning{{used after it is released}}
714 [_ivarOnly myMethod]; // FIXME-warning{{used after it is released}}
723 CFUse(_cfProp); // FIXME-warning{{used after it is released}}
[all …]
/external/llvm/lib/Target/X86/
DX86ScheduleBtVer2.td26 // FIXME: SSE4/AVX is unimplemented. This flag is set to allow
41 // Any pipe - FIXME we need this until we can discriminate between int/fpu load/store/moves properly
118 // FIXME 8/16 bit divisions
129 // FIXME: SAGU 3-operand LEA
140 // FIXME: Split x86 and SSE load/store/moves
163 // FIXME: should we bother splitting JFPU pipe + unit stages for fast instructions?
164 // FIXME: Double precision latencies
165 // FIXME: SS vs PS latencies
166 // FIXME: ymm latencies
195 // FIXME: integer pipes
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/WebAssembly/
Dwasm.txt15 # FIXME: fix p2align output in WebAssemblyInstPrinter
20 # FIXME: WebAssemblyInstPrinter does not currently print block number.
25 # FIXME: WebAssemblyInstPrinter does not print immediates.
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Dicmpa.ll27 ; FIXME: This instruction is redundant. The sltiu can only produce 0 and 1.
48 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
68 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
88 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
108 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
128 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
147 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
166 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
187 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
206 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/Fast-ISel/
Dicmpa.ll27 ; FIXME: This instruction is redundant. The sltiu can only produce 0 and 1.
48 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
68 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
88 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
108 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
128 ; FIXME: This instruction is redundant. The sltu can only produce 0 and 1.
147 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
166 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
187 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
206 ; FIXME: This instruction is redundant. The slt can only produce 0 and 1.
/external/swiftshader/src/OpenGL/common/
Ddebug.h46 #define FIXME(message, ...) (void(0)) macro
48 #define FIXME(message, ...) do {es::trace("fixme: %s(%d): " message "\n", __FUNCTION__, __LINE__, #… macro
80 #define UNIMPLEMENTED(...) FIXME("\t! Unimplemented: %s(%d)\n", __FUNCTION__, __LINE__)
/external/libcxx/include/
Dmodule.modulemap10 // FIXME: The standard does not require that each of these submodules
48 // FIXME: <stdalign.h> is missing.
59 // FIXME: This module only exists on OS X and for some reason the
78 // FIXME: <uchar.h> is missing.
161 // FIXME: <cstdalign> is missing.
201 // FIXME: <cuchar> is missing.
323 // FIXME: should re-export ios, streambuf?
370 // FIXME: should re-export ios, streambuf?
403 // FIXME: should re-export istream, ostream, ios, streambuf, string?
494 // FIXME: These should be private.
[all …]
/external/llvm/test/CodeGen/Mips/
Dcmov.ll32 ; FIXME: This sll works around an implementation detail in the code generator
72 ; FIXME: This sll works around an implementation detail in the code generator
125 ; FIXME: Use xori instead of addiu+xor.
135 ; FIXME: Use xori instead of addiu+xor.
195 ; FIXME: Use xori instead of addiu+xor.
213 ; FIXME: Use xori instead of addiu+xor.
248 ; FIXME: We can do better than this by using selccz to choose between +0 and +2
261 ; FIXME: We can do better than this by using selccz to choose between +0 and +2
285 ; FIXME: We can do better than this by using selccz to choose between -0 and -2
300 ; FIXME: We can do better than this by using selccz to choose between -0 and -2
[all …]

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