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Searched refs:FMA3 (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dfmsubadd-combine.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck -check-prefix=FMA3 -check…
3 …e=x86_64-unknown-linux-gnu -mattr=+fma,+avx512f | FileCheck -check-prefix=FMA3 -check-prefix=FMA3_…
32 ; FMA3-LABEL: mul_subadd_ps128:
33 ; FMA3: # %bb.0: # %entry
34 ; FMA3-NEXT: vfmsubadd213ps %xmm2, %xmm1, %xmm0
35 ; FMA3-NEXT: retq
50 ; FMA3-LABEL: mul_subadd_pd256:
51 ; FMA3: # %bb.0: # %entry
52 ; FMA3-NEXT: vfmsubadd213pd %ymm2, %ymm1, %ymm0
53 ; FMA3-NEXT: retq
[all …]
Dfmaddsub-combine.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck -check-prefix=FMA3 -check…
3 …e=x86_64-unknown-linux-gnu -mattr=+fma,+avx512f | FileCheck -check-prefix=FMA3 -check-prefix=FMA3_…
9 ; FMA3-LABEL: mul_addsub_pd128:
10 ; FMA3: # %bb.0: # %entry
11 ; FMA3-NEXT: vfmaddsub213pd %xmm2, %xmm1, %xmm0
12 ; FMA3-NEXT: retq
27 ; FMA3-LABEL: mul_addsub_ps128:
28 ; FMA3: # %bb.0: # %entry
29 ; FMA3-NEXT: vfmaddsub213ps %xmm2, %xmm1, %xmm0
30 ; FMA3-NEXT: retq
[all …]
Dfma-phi-213-to-231.ll5 ; Test FMA3 variant selection
/external/llvm/lib/Target/X86/
DX86InstrFMA.td15 // FMA3 - Intel 3 operand Fused Multiply-Add instructions
43 def r : FMA3<opc, MRMSrcReg, (outs VR128:$dst),
51 def m : FMA3<opc, MRMSrcMem, (outs VR128:$dst),
59 def rY : FMA3<opc, MRMSrcReg, (outs VR256:$dst),
67 def mY : FMA3<opc, MRMSrcMem, (outs VR256:$dst),
141 // defining FMA3 opcodes above.
147 def r : FMA3<opc, MRMSrcReg, (outs RC:$dst),
154 def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),
179 def r_Int : FMA3<opc, MRMSrcReg, (outs RC:$dst),
186 def m_Int : FMA3<opc, MRMSrcMem, (outs RC:$dst),
DX86InstrFormats.td844 // FMA3 Instruction Templates
845 class FMA3<bits<8> o, Format F, dag outs, dag ins, string asm,
/external/llvm/test/CodeGen/AMDGPU/
Dfdiv.f64.ll25 ; COMMON-DAG: v_fma_f64 [[FMA3:v\[[0-9]+:[0-9]+\]]], [[FMA1]], [[FMA2]], [[FMA1]]
26 ; COMMON-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]]
28 ; COMMON: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dfdiv.f64.ll25 ; GCN-DAG: v_fma_f64 [[FMA3:v\[[0-9]+:[0-9]+\]]], [[FMA1]], [[FMA2]], [[FMA1]]
26 ; GCN-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]]
28 ; GCN: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]]
/external/v8/src/codegen/
Dcpu-features.h23 FMA3, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrFMA.td15 // FMA3 - Intel 3 operand Fused Multiply-Add instructions
40 def r : FMA3<opc, MRMSrcReg, (outs RC:$dst),
48 def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),
61 def r : FMA3<opc, MRMSrcReg, (outs RC:$dst),
68 def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),
81 def r : FMA3<opc, MRMSrcReg, (outs RC:$dst),
90 def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),
176 // defining FMA3 opcodes above.
DX86InstrFormats.td879 // FMA3 Instruction Templates
880 class FMA3<bits<8> o, Format F, dag outs, dag ins, string asm,
/external/llvm/test/CodeGen/X86/
Dfma-phi-213-to-231.ll5 ; Test FMA3 variant selection
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dfma.ll78 ; NO-FMA-NEXT: [[FMA3:%.*]] = call double @llvm.fma.f64(double [[A3]], double [[B3]], double [[C…
82 ; NO-FMA-NEXT: store double [[FMA3]], double* getelementptr inbounds ([8 x double], [8 x double]…
145 ; NO-FMA-NEXT: [[FMA3:%.*]] = call double @llvm.fma.f64(double [[A3]], double [[B3]], double [[C…
153 ; NO-FMA-NEXT: store double [[FMA3]], double* getelementptr inbounds ([8 x double], [8 x double]…
241 ; NO-FMA-NEXT: [[FMA3:%.*]] = call float @llvm.fma.f32(float [[A3]], float [[B3]], float [[C3]])
245 ; NO-FMA-NEXT: store float [[FMA3]], float* getelementptr inbounds ([16 x float], [16 x float]* …
308 ; NO-FMA-NEXT: [[FMA3:%.*]] = call float @llvm.fma.f32(float [[A3]], float [[B3]], float [[C3]])
316 ; NO-FMA-NEXT: store float [[FMA3]], float* getelementptr inbounds ([16 x float], [16 x float]* …
427 ; NO-FMA-NEXT: [[FMA3:%.*]] = call float @llvm.fma.f32(float [[A3]], float [[B3]], float [[C3]])
443 ; NO-FMA-NEXT: store float [[FMA3]], float* getelementptr inbounds ([16 x float], [16 x float]* …
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dfma.ll78 ; NO-FMA-NEXT: [[FMA3:%.*]] = call double @llvm.fma.f64(double [[A3]], double [[B3]], double [[C…
82 ; NO-FMA-NEXT: store double [[FMA3]], double* getelementptr inbounds ([8 x double], [8 x double]…
145 ; NO-FMA-NEXT: [[FMA3:%.*]] = call double @llvm.fma.f64(double [[A3]], double [[B3]], double [[C…
153 ; NO-FMA-NEXT: store double [[FMA3]], double* getelementptr inbounds ([8 x double], [8 x double]…
241 ; NO-FMA-NEXT: [[FMA3:%.*]] = call float @llvm.fma.f32(float [[A3]], float [[B3]], float [[C3]])
245 ; NO-FMA-NEXT: store float [[FMA3]], float* getelementptr inbounds ([16 x float], [16 x float]* …
308 ; NO-FMA-NEXT: [[FMA3:%.*]] = call float @llvm.fma.f32(float [[A3]], float [[B3]], float [[C3]])
316 ; NO-FMA-NEXT: store float [[FMA3]], float* getelementptr inbounds ([16 x float], [16 x float]* …
427 ; NO-FMA-NEXT: [[FMA3:%.*]] = call float @llvm.fma.f32(float [[A3]], float [[B3]], float [[C3]])
443 ; NO-FMA-NEXT: store float [[FMA3]], float* getelementptr inbounds ([16 x float], [16 x float]* …
/external/v8/src/compiler/backend/x64/
Dcode-generator-x64.cc2468 if (CpuFeatures::IsSupported(FMA3)) { in AssembleArchInstruction()
2469 CpuFeatureScope fma3_scope(tasm(), FMA3); in AssembleArchInstruction()
2481 if (CpuFeatures::IsSupported(FMA3)) { in AssembleArchInstruction()
2482 CpuFeatureScope fma3_scope(tasm(), FMA3); in AssembleArchInstruction()
2657 if (CpuFeatures::IsSupported(FMA3)) { in AssembleArchInstruction()
2658 CpuFeatureScope fma3_scope(tasm(), FMA3); in AssembleArchInstruction()
2670 if (CpuFeatures::IsSupported(FMA3)) { in AssembleArchInstruction()
2671 CpuFeatureScope fma3_scope(tasm(), FMA3); in AssembleArchInstruction()
Dinstruction-selector-x64.cc3221 if (CpuFeatures::IsSupported(FMA3)) { \
/external/v8/src/codegen/ia32/
Dassembler-ia32.cc144 supported_ |= 1u << FMA3; in ProbeImpl()
164 CpuFeatures::IsSupported(FMA3), CpuFeatures::IsSupported(BMI1), in PrintFeatures()
2801 DCHECK(IsEnabled(FMA3)); in vfmasd()
2810 DCHECK(IsEnabled(FMA3)); in vfmass()
/external/v8/src/codegen/x64/
Dassembler-x64.cc96 supported_ |= 1u << FMA3; in ProbeImpl()
119 CpuFeatures::IsSupported(FMA3), CpuFeatures::IsSupported(BMI1), in PrintFeatures()
3426 DCHECK(IsEnabled(FMA3)); in fma_instr()
3436 DCHECK(IsEnabled(FMA3)); in fma_instr()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DIntrinsicsX86.td1903 // FMA3 and FMA4
/external/llvm/include/llvm/IR/
DIntrinsicsX86.td2875 // FMA3 and FMA4