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Searched refs:FPD_SLCR_WDT_CLK_SEL (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/xilinx/zynqmp/include/
Dzynqmp_def.h332 #define FPD_SLCR_WDT_CLK_SEL (FPD_SLCR_BASEADDR + 0x100) macro
/external/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/
Dpm_api_clock.c2109 .control_reg = FPD_SLCR_WDT_CLK_SEL,