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Searched refs:FPMulAdd (Results 1 – 6 of 6) sorted by relevance

/external/vixl/src/aarch64/
Dlogic-aarch64.cc2334 dst.SetFloat<T>(e * 2, FPMulAdd(dst.Float<T>(e * 2), element2, element1)); in fcmla()
2336 FPMulAdd(dst.Float<T>(e * 2 + 1), element4, element3)); in fcmla()
2388 dst.SetFloat<T>(e * 2, FPMulAdd(dst.Float<T>(e * 2), element2, element1)); in fcmla()
2390 FPMulAdd(dst.Float<T>(e * 2 + 1), element4, element3)); in fcmla()
3748 T Simulator::FPMulAdd(T a, T op1, T op2) { in FPMulAdd() function in vixl::aarch64::Simulator
4413 T result = FPMulAdd(acc, op1, op2); in fmla()
4446 T result = FPMulAdd(acc, op1, op2); in fmls()
4479 float result = FPMulAdd(acc, op1, op2); in fmlal()
4497 float result = FPMulAdd(acc, op1, op2); in fmlal2()
4514 float result = FPMulAdd(acc, op1, op2); in fmlsl()
[all …]
Dsimulator-aarch64.cc3728 FPMulAdd(ReadHRegister(fa), in VisitFPDataProcessing3Source()
3734 FPMulAdd(ReadHRegister(fa), in VisitFPDataProcessing3Source()
3740 FPMulAdd(ReadSRegister(fa), in VisitFPDataProcessing3Source()
3746 FPMulAdd(ReadSRegister(fa), in VisitFPDataProcessing3Source()
3752 FPMulAdd(ReadDRegister(fa), in VisitFPDataProcessing3Source()
3758 FPMulAdd(ReadDRegister(fa), in VisitFPDataProcessing3Source()
3765 FPMulAdd(-ReadHRegister(fa), in VisitFPDataProcessing3Source()
3771 FPMulAdd(-ReadHRegister(fa), in VisitFPDataProcessing3Source()
3777 FPMulAdd(-ReadSRegister(fa), in VisitFPDataProcessing3Source()
3783 FPMulAdd(-ReadSRegister(fa), in VisitFPDataProcessing3Source()
[all …]
Dsimulator-aarch64.h3183 T FPMulAdd(T a, T op1, T op2);
/external/v8/src/execution/arm64/
Dsimulator-arm64.cc3077 set_sreg(fd, FPMulAdd(sreg(fa), sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
3080 set_sreg(fd, FPMulAdd(sreg(fa), -sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
3083 set_dreg(fd, FPMulAdd(dreg(fa), dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
3086 set_dreg(fd, FPMulAdd(dreg(fa), -dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
3090 set_sreg(fd, FPMulAdd(-sreg(fa), -sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
3093 set_sreg(fd, FPMulAdd(-sreg(fa), sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
3096 set_dreg(fd, FPMulAdd(-dreg(fa), -dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
3099 set_dreg(fd, FPMulAdd(-dreg(fa), dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
Dsimulator-logic-arm64.cc2976 T Simulator::FPMulAdd(T a, T op1, T op2) { in FPMulAdd() function in v8::internal::Simulator
3506 T result = FPMulAdd(acc, op1, op2); in fmla()
3533 T result = FPMulAdd(acc, op1, op2); in fmls()
Dsimulator-arm64.h2209 T FPMulAdd(T a, T op1, T op2);