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Searched refs:FPRoundOdd (Results 1 – 6 of 6) sorted by relevance

/external/vixl/src/
Dutils-vixl.h1020 FPRoundOdd enumerator
1048 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPRound()
1127 VIXL_ASSERT(round_mode == FPRoundOdd); in FPRound()
1160 VIXL_ASSERT(round_mode == FPRoundOdd); in FPRound()
1204 VIXL_ASSERT(round_mode == FPRoundOdd); in FPRound()
Dutils-vixl.cc340 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPToFloat()
/external/v8/src/codegen/arm64/
Dinstructions-arm64.h76 FPRoundOdd enumerator
/external/v8/src/execution/arm64/
Dsimulator-arm64.h56 DCHECK((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPRound()
135 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
168 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
208 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
Dsimulator-logic-arm64.cc294 DCHECK((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPToFloat()
3883 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPRoundOdd)); in fcvtxn()
3893 dst.SetFloat(i + lane_count, FPToFloat(src.Float<double>(i), FPRoundOdd)); in fcvtxn2()
/external/vixl/src/aarch64/
Dlogic-aarch64.cc5089 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPRoundOdd, ReadDN())); in fcvtxn()
5102 FPToFloat(src.Float<double>(i), FPRoundOdd, ReadDN())); in fcvtxn2()