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Searched refs:FSL_CORENET_RCWSR4_SRDS_PRTCL (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dfsl_corenet_serdes.c176 prtcl = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in serdes_get_first_lane()
259 prtcl = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in serdes_reset_rx()
529 cfg = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in fsl_serdes_init()
/external/u-boot/board/freescale/p2041rdb/
Dp2041rdb.c82 FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in board_config_lanes_mux()
/external/u-boot/board/freescale/corenet_ds/
Deth_superhydra.c428 FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in board_eth_init()
/external/u-boot/arch/powerpc/include/asm/
Dimmap_85xx.h1832 #define FSL_CORENET_RCWSR4_SRDS_PRTCL 0xfc000000 macro