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Searched refs:HHI_GCLK_MPEG1 (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/drivers/clk/meson/
Dgxbb.c109 MESON_GATE(CLKID_I2S_SPDIF, HHI_GCLK_MPEG1, 2),
110 MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
111 MESON_GATE(CLKID_DEMUX, HHI_GCLK_MPEG1, 4),
112 MESON_GATE(CLKID_AIU_GLUE, HHI_GCLK_MPEG1, 6),
113 MESON_GATE(CLKID_IEC958, HHI_GCLK_MPEG1, 7),
114 MESON_GATE(CLKID_I2S_OUT, HHI_GCLK_MPEG1, 8),
115 MESON_GATE(CLKID_AMCLK, HHI_GCLK_MPEG1, 9),
116 MESON_GATE(CLKID_AIFIFO2, HHI_GCLK_MPEG1, 10),
117 MESON_GATE(CLKID_MIXER, HHI_GCLK_MPEG1, 11),
118 MESON_GATE(CLKID_MIXER_IFACE, HHI_GCLK_MPEG1, 12),
[all …]
Daxg.c35 MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
36 MESON_GATE(CLKID_UART1, HHI_GCLK_MPEG1, 16),
Dg12a.c116 MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
117 MESON_GATE(CLKID_UART1, HHI_GCLK_MPEG1, 16),
118 MESON_GATE(CLKID_USB, HHI_GCLK_MPEG1, 25),
/external/u-boot/arch/arm/include/asm/arch-meson/
Dclock-axg.h54 #define HHI_GCLK_MPEG1 0x144 macro
Dclock-g12a.h48 #define HHI_GCLK_MPEG1 0x144 macro
Dclock-gx.h36 #define HHI_GCLK_MPEG1 0x144 /* 0x51 offset in data sheet */ macro