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Searched refs:HHI_SD_EMMC_CLK_CNTL (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-meson/
Dclock-axg.h77 #define HHI_SD_EMMC_CLK_CNTL 0x264 macro
Dclock-g12a.h75 #define HHI_SD_EMMC_CLK_CNTL 0x264 macro
Dclock-gx.h72 #define HHI_SD_EMMC_CLK_CNTL 0x264 /* 0x99 offset in data sheet */ macro
/external/u-boot/drivers/clk/meson/
Daxg.c47 MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23),
Dgxbb.c185 MESON_GATE(CLKID_SD_EMMC_A_CLK0, HHI_SD_EMMC_CLK_CNTL, 7),
186 MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23),
Dg12a.c129 MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23),