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Searched refs:HHI_VID_CLK_DIV (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/video/meson/
Dmeson_vclk.c40 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
285 hhi_update_bits(HHI_VID_CLK_DIV, in meson_venci_cvbs_clock_config()
769 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
836 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
840 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
850 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
855 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
866 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
871 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
882 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
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/external/u-boot/arch/arm/include/asm/arch-meson/
Dclock-axg.h60 #define HHI_VID_CLK_DIV 0x164 macro
Dclock-g12a.h52 #define HHI_VID_CLK_DIV 0x164 macro
Dclock-gx.h43 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro