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Searched refs:HHI_VIID_CLK_CNTL (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/video/meson/
Dmeson_vclk.c34 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro
264 hhi_update_bits(HHI_VIID_CLK_CNTL, VCLK2_EN, 0); in meson_venci_cvbs_clock_config()
275 hhi_update_bits(HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
278 hhi_update_bits(HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
282 hhi_update_bits(HHI_VIID_CLK_CNTL, VCLK2_EN, VCLK2_EN); in meson_venci_cvbs_clock_config()
296 hhi_update_bits(HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
300 hhi_update_bits(HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
302 hhi_update_bits(HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
/external/u-boot/arch/arm/include/asm/arch-meson/
Dclock-axg.h51 #define HHI_VIID_CLK_CNTL 0x12c macro
Dclock-g12a.h46 #define HHI_VIID_CLK_CNTL 0x12C macro
Dclock-gx.h33 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro