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Searched refs:HW_SSCG_DRAM_PLL_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-imx8m/
Dclock_imx8mq.h411 #define HW_SSCG_DRAM_PLL_DIV_MASK (0x7 << 14) macro
/external/u-boot/arch/arm/mach-imx/imx8m/
Dclock_imx8mq.c131 pllout_div_mask = HW_SSCG_DRAM_PLL_DIV_MASK; in decode_sscg_pll()